Digital Logic HELP needed

Discussion in 'Homework Help' started by matt-nick, Dec 15, 2014.

  1. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    hi all, i am a little stuck on a question that has been set for me as part of my HND in engineering. i have not done anything with JK flip flops for a good 5 years and so have forgotten it all.

    basicaly, i am to design and simulate a synchronous four bit counter with the following pattern;
    0,8,4,2,9,12,14,7,3,1

    the above count should be converted into its binary form with the outputs given the following designation: Qd,Qc,Qb,Qa

    two designs are required, one with JK flip flops and one with Dtype flip flops. the count numbers 5,6,10,11 and 13 may be classed as dont care terms.

    many thanks for any help given.
     
  2. WBahn

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    Mar 31, 2012
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    Presumably you knew how to do this five years ago, right? So dig out your texts (or use Google or some other reference) to try to bring yourself up to speed on it and make a good effort at designing it. It might help to start with something simpler, like a two-bit machine that counts 0,3,2.

    Post your best attempt at the design and then we can help guide you from there.
     
  3. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    ive know created a jk flip flop counting circuit on circuit wizard that counts from 0000 up to 1111. but im unsure how to get it to count in the sequence i require, missing out 5,6,10,11 and 13.
     
  4. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    upload_2014-12-15_13-40-5.png
     
  5. MrChips

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    Oct 2, 2009
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  6. WBahn

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    Mar 31, 2012
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    The circuit you have is basically a string of T-type flip flops (a TFF, which is what you get when you connect the J and K inputs of a JKFF together). You can certainly design the counter you want using TFFs, but that is not what is asked for (though since the TFFs are made from JKFFs, it arguable should count as satisfying the first requirement).

    What you need to do (or, more accurately, what I recommend that you do) is first prepare a state transition table and then extend it to include the excitation logic (what the inputs to the J and K inputs of each FF needs to be).
     
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  7. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    as silly as this probably sounds, i have never done anything with state transition tables and so am unsure as to what to do next "/ and the flip flops i used in the circit seemed to be the closest ones in circuit wizard to which i needed. thanks for all your help so far.
     
  8. MrChips

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    Oct 2, 2009
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    Follow the discussion in the thread provided above.

    Step 1

    Draw a truth table. On left colums, show all values Qd, Qc, Qb, Qa in sequence from 0000 to 1111.
    On the right colums, show the next state, for example, 0 → 8, 5→X.
     
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  9. WBahn

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    And, again, you might be well served by starting with a much simpler problem (the two-bit machine with the 0,3,2 sequence, for instance) so that you can focus on the concepts with a machine that has 4 states and 4 control inputs and not get bogged down in the bookkeeping of a machine that has 16 states and 8 control inputs.
     
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  10. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    yes i think that is what i shall have a go at. when talking about the next state for example, 0 → 8, 5 → x what values do i put where. i mean, where did the 0 come from and turn into 8?
     
  11. WBahn

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    They came from your specification, namely that the counter go in the sequence 0,8,4,2,9,12,14,7,3,1.

    If you are in state 0, you next go to state 8. If you are in state 7 you next go to state 3. If you are in state 5, you next go to state X, meaning that you don't care where you end up (which was also part of the spec you gave in your original post).
     
  12. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    aww right i get that now, ill have a good read up on all f this state transition when i get home from work. and report back as soon as i am more clear on this. :)
     
  13. WBahn

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    Oh, and I just noticed that you don't define the behavior for state 15. I'm guessing that this is an oversight and that it is really a 'don't care', correct?
     
  14. matt-nick

    Thread Starter New Member

    Dec 15, 2014
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    it does not say in the question whether it is ti be accounted for or an 'i don't care item' so i can only assume that its not cared for. but that is just what i assume. i am in college tomorrow and so can ask my lecturer about this. hopefully he can enlightne me and then the problem can be worked out fairly easily :)
     
  15. tshuck

    Well-Known Member

    Oct 18, 2012
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    You may benefit from a thread I have to act as an addendum to the current section on synchronous counters in the eBook. It shows how to design a MOD-16 counter, but the design portion is the same: define your state transitions and minimize the input-forming logic.
    Here is the thread.

    You may also want to look at the portion on modulus counters since you are not using all possible states for n flip flops, and that determines the behavior should the counter everend up in an invalid state (through the use of don't-care states).
     
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