Hi.
I need help about differential amplifier in the picture below?

Q1:
How do you know that Vgs (small signal) of M1 and M2 are Vid/2 and -Vid/2 respectively?
Q2:
From 5, it is clear that 0.5gm1vid+0.5gm2vid = gm1*Vin = gm2*Vin.
Why it that?

Thank you.

 

I just found the great answer for Q1 from Design of Analog CMOS Integrated Circuits, Behzad Razavi.

Could anyone help me with Q2?

 

Hi anhnha take a look at this diagram

If we assume that M1 and M2 are identical. Also notice that Vid is connect across M1 gate and M2 gate. So from II Kirchhoff's law we can write that
Vid = Vgs1 + Vsg2 and from this we have
Vgs1 = Vid/2
Vsg2 = Vid/2 (Vsg2 = - Vgs1)
As you know the drain current is equal to Id = gm*Vgs
So we have this
Id1 = gm1*Vgs1 = gm1 * Vid/2 = (gm1*Vid2)/2
Id2 = -(gm2*Vid2)/2
And

Iout = Id1 - Id2 = (gm1*Vid2)/2 - (-(gm2*Vid2)/2 ) = (gm1 * Vid)/2 + (gm2 * Vid)/2

And because M1 and M2 are identical and symmetrical
(gm1*Vid2)/2 - (-(gm2*Vid2)/2 ) = (gm1 * Vid)/2 + (gm2 * Vid)/2 = gm1 * Vid = gm2 * Vid

 

Thanks for the detailed answer, Jony.

I see there is an assumption that M1 and M2 are identical and symmetrical and therefore, gm1 also equals gm2.

There is also two questions left, please explain.

Q3. Why, in small signal model, the voltage at the drain of M5 is zero?
(the picture in the first post)

Q4. Is there an easy way to know that the output resistance of that circuit is only related to M2 and M4 not M1 and M3?

M5 isn't included in Rout expression because in ac model both drain and source of it are grounded.
However, how about M1 and M3? It seems that we can split the circuit into two parts for ac analysis.

The first half includes M1 and M3 and the other includes M2 and M4.
Actually, it seems to me that Rout = rds2||rds4

Ah, I think I just figure it out.
Please check if it is right. From the simple small signal model, it is clear that Rout = rds2||rds4.

 

Could you tell me how to get Rout for the folded cascode Op-Amp as in the figure below?
(http://users.ece.gatech.edu/pallen/Academic/ECE_6412/Spring_2003/L170-IntuitiveAnalysis-2UP.pdf)
I am learning the technique to analyse a circuit in small signal from the schematic (without having to draw small signal model).

I guess that the note is used but I still can't get it.

Approximate the output resistance of any cascode circuit as Rout ≈(gm2rds2)rds1 where M1 is a transistor cascoded by M2.

 

Approximate the output resistance of any cascode circuit as Rout ≈(gm2rds2)rds1 where M1 is a transistor cascoded by M2.

Yes this note is the key. We are looking for Rout at the output terminal.

As you can see from this diagram we have two path from output terminal to GND.

The first path show in red we have M9 and M11.
And because M9 is cascade transistor we have
R_red = (gm9*rds9) *rds11
And finally the blue path. And again M7 is a cascade transistor.
After M7 we see M5 rds5 and M2 rds2 connect in parallel.
Therefore
R_blue = (gm7*rds7)*(rds7||rds2)

And finally Rout = R_red||R_blue

 

Thanks. I will need to prove the formula of Rout for cascode circuit.

I can't get R_blue.
I see (from the formula) that M2, M5 and M7 forms a cascode circuit. Why is that?
The cascode circuit includes two transistors, with one operating as a common source (M2 in this case) and the other as a common gate (M7 in the case). However, what I am confused is M5.
It seems that M5 also considered as a common source and therefore, M2 and M5 will act as a common source as a whole.

I need to go out getting something for dinner right now.
BTW, could you help me with the question Q3 in post #4?

P.S Why M9 is a cascode transistor? How do you know that the voltage at G of M9 is a constant?

 

I see (from the formula) that M2, M5 and M7 forms a cascode circuit. Why is that?
The cascode circuit includes two transistors, with one operating as a common source (M2 in this case) and the other as a common gate (M7 in the case). However, what I am confused is M5.
It seems that M5 also considered as a common source and therefore, M2 and M5 will act as a common source as a whole.

Yes, M2 and M7 is a cascode stage, where M2 is a bottom transistor (CS) amp and M7is a upper transistor work as a CG stage.
M5 is a current source. And for the AC signal M5 is connect in parallel with M2

I need to go out getting something for dinner right now.
BTW, could you help me with the question Q3 in post #4?

For the DC current Id1 + Id2 = I5 and I5 is constant.
But for the AC signal if Vg1 voltage is increased by Vid/2 in the same time Vg2 is must decreased by -Vid/2.
So the Id1 current will increase his value ΔId1 but at the same time Id2 decrease his value by -ΔId2.
And for full symmetrical circuit ΔId1 = |-ΔId2| and this means that change in ΔId5 is equal to 0A. And this is why we have a virtual ground at joint source connection.
Try read this post (4)
http://forum.allaboutcircuits.com/showthread.php?t=54814

P.S Why M9 is a cascode transistor? How do you know that the voltage at G of M9 is a constant?

Why do I need to know Vg voltage?
M9 is cascode transistor because M9 is on top of M11 transistor.

 

M5 is a current source. And for the AC signal M5 is connect in parallel with M2

Oh, I see it now. Because M5 is an independent current source, in ac model, it is open circuited and only rds5 left.

For the DC current Id1 + Id2 = I5 and I5 is constant.
But for the AC signal if Vg1 voltage is increased by Vid/2 in the same time Vg2 is must decreased by -Vid/2.
So the Id1 current will increase his value ΔId1 but at the same time Id2 decrease his value by -ΔId2.
And for full symmetrical circuit ΔId1 = |-ΔId2| and this means that change in ΔId5 is equal to 0A. And this is why we have a virtual ground at joint source connection.

Then, ΔId5 = ΔId1 + ΔId2 = 0, or the ac voltage across M5 is zero.
Is that right?

Why do I need to know Vg voltage?
M9 is cascode transistor because M9 is on top of M11 transistor.

According to the definition a cascode amplifier includes two transistors, with one operating as a common source and the other as a common gate. For M9 to be a common gate, its gate voltage has to be constant.
And the output resistance formula for cascode circuit above only correct if the cascode transistor is common gate.

 

Here is my proof of output resistance formula for a cascode amplifier:

Rout = Vx/Ix when Vin = 0.
From the figure:
Vx = (Ix + gm2*V)*ro2 + V
V = Ix*ro1
Therefore:
Vx = (Ix + gm2*Ix*ro1)*ro2 + Ix*ro1 = Ix (ro1 + gm2*ro2*ro1 + ro2)

So, Rout = Vx/Ix = ro1 + gm2*ro2*ro1 + ro2

Am I wrong or ro1 + ro2 is too small compared to gm2*ro2*ro1 and therefore it is omitted?

 

Then, ΔId5 = ΔId1 + ΔId2 = 0, or the ac voltage across M5 is zero.
Is that right?

Exactly.

According to the definition a cascode amplifier includes two transistors, with one operating as a common source and the other as a common gate. For M9 to be a common gate, its gate voltage has to be constant.
And the output resistance formula for cascode circuit above only correct if the cascode transistor is common gate.

Ok I see, M11 is CS amp becomes source is connect to Vdd. M9 input is Id11 drain current. And if the input as source this means that M9 is CG amp.

Here is my proof of output resistance formula for a cascode amplifier:

Rout = Vx/Ix when Vin = 0.
From the figure:
Vx = (Ix + gm2*V)*ro2 + V
V = Ix*ro1
Therefore:
Vx = (Ix + gm2*Ix*ro1)*ro2 + Ix*ro1 = Ix (ro1 + gm2*ro2*ro1 + ro2)

So, Rout = Vx/Ix = ro1 + gm2*ro2*ro1 + ro2

Am I wrong or ro1 + ro2 is too small compared to gm2*ro2*ro1 and therefore it is omitted?

Your solution looks good. For example if ro1= ro2 = 100K and gm = 1mS

ro1 + ro2 = 200K

ro1 * ro2 * 1mS = 10000000kΩ * 1mS = 10GΩ *1mS = 10MΩ

 

M9 input is Id11 drain current. And if the input as source this means that M9 is CG amp.

I am still confused. To be common gate, the gate of M9 has to be ground in ac model. I don't see M9 meet that requirement.

 

I am still confused. To be common gate, the gate of M9 has to be ground in ac model. I don't see M9 meet that requirement.

Are you sure about that ?
M9 gate is connect to M8 drain. So form M8 drain we have two path to grand for AC signal.
First path via ro6 and ro7 and via ro8 and ro10.
Solve for Ro for this circuit

 

For the particular circuit, Ro is the same as the one before because in ac model, gate voltage is still zero.

However, I am trying to see how gate voltage of M9 is also zero. The circuit is complex and it is confusing.

 

However, I am trying to see how gate voltage of M9 is also zero

Try to treat ro6 and ro7 as a upper resistor and ro8, ro10 as a lower divider resistor.

The circuit is complex and it is confusing.

Yes you are right. But hey what can we do about this?

 

Try to treat ro6 and ro7 as a upper resistor and ro8, ro10 as a lower divider resistor.

The problem is that M8, M10, M6 and M7 are not reduced as resistors in ac model.
With M4, M5 they are independent current sources and so, in ac model, they are equal to rds4 and rds4.
But M8, M10, M6 and M7 are dependent current sources in ac model. I think we can't treat them like resistors.

 

Look at this pdf
http://users.ece.gatech.edu/phasler/Courses/ECE4430/Unit2/Current_Mirrors.pdf (page 18)

 

I also just found this cascode current mirror that is the one used in the circuit above.

From the picture, the lecture says:
VDS1= VDS2 if VGS3= VGS4

But how can we guarantee that VGS3= VGS4 for that circuit?

 

Look at this pdf
http://users.ece.gatech.edu/phasler/Courses/ECE4430/Unit2/Current_Mirrors.pdf (page 18)

Excellent answer! Thank you.
Could you help me with the question in post #18?

 

I also just found this cascode current mirror that is the one used in the circuit above.

From the picture, the lecture says:
VDS1= VDS2 if VGS3= VGS4

But how can we guarantee that VGS3= VGS4 for that circuit?

But do you understand why in "single" current mirror (without M3 and M4)
Vds1 = Vgs2?
And you don't need to hurry, because I need to go to sleep now.