Differential Amplifier with PMOS Load

Discussion in 'Homework Help' started by Tarquin Hardwicke, Oct 23, 2013.

  1. Tarquin Hardwicke

    Thread Starter New Member

    Oct 23, 2013
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    Hi,

    I am having trouble with the following question.

    Calculate the branch currents for a common-mode input voltage of 1 V. Calculate the node voltage at the drain of the tail current source.

    [​IMG]

    How do I go about solving this? Do I apply 1 V to each NMOS device and proceed from there - or is this not necessary?

    How do I determine the region of operations each device is in? What values for V_DS do I use for each device?

    I have tried almost all permutations imaginable, to absolutely no avail.

    I have a copy of Design of Analog CMOS Integrated Circuits by Razavi, but it doesn't seem to help much with analyses such as the above.

    Many thanks,
    Tarquin.
     
  2. Tarquin Hardwicke

    Thread Starter New Member

    Oct 23, 2013
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    If I first begin by only considering one half of the circuit:

    Let x be the node at the drain of the current source tail.

    PMOS:
    V_GS = 0.88 - 1.5 = -0.62; |V_GS| = 0.62
    V_GT = V_GS - V_tp = -0.62 + 0.3 = -0.32; |V_GT| = 0.32
    V_DS = V_OUT+ - 1.5; |V_DS| = 1.5 - V_OUT+
    Region of operation - Triode or Saturation - how do I know?

    NMOS:
    V_GS = 1 - V_x
    V_GT = 1 - V_x - V_tn = 0.8 - V_x
    V_DS = V_OUT+ - V_x
    Region of operation - fairly sure this should be in saturation.

    TAIL:
    V_GS = 0.6
    V_GT = 0.4
    V_DS = V_x
    Region of operation - not sure. Depends on V_x which has not been determined.

    I_tail = 2 I_D

    So that's what I have so far. There is not enough information to solve by simultaneous equations.

    Ravazi has two examples of this, where the PMOS devices are in triode or in saturation, but it does not offer any guidance as to when the two cases hold.
     
  3. Tarquin Hardwicke

    Thread Starter New Member

    Oct 23, 2013
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    Circuit attached.
    [​IMG]
    circuit.jpg
     
  4. WBahn

    Moderator

    Mar 31, 2012
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    Q1) If you were given the voltage at the drain of the tail transistor, could you find the current (and which mode it was in)?

    Q2) If you were given the common-mode voltage of Vout, could you find the current in the PFETs (and which mode they are in)?

    Q3) If you were given the common-mode voltage of Vout and the voltage at the drain of the tail transistor, could you find the current in the input NFETs?

    Q4) What do you know about the relationships between the currents in the PFETs, the NFETs, and the tail transistor?
     
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  5. Tarquin Hardwicke

    Thread Starter New Member

    Oct 23, 2013
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    Hi WBahn, thanks for your reply.

    Yes, I would have the following:
    V_ov = 0.4
    V_DS = V_x

    If V_x > V_ov then the device would be in saturation, else triode.

    Yes, I would have the following:
    V_ov = 0.32
    V_DS = 1.5 - Vout

    If V_DS > V_ov then the device would be in saturation, else triode.

    Yes:
    V_ov = 0.8 - V_x
    V_DS = Vout - V_x

    I_p = I_n = 0.5 I_tail

    But this would leave me with many combinations to try current equations for - there must be an easier way?
     
    Last edited: Oct 23, 2013
  6. Tarquin Hardwicke

    Thread Starter New Member

    Oct 23, 2013
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    The current equations would be:

    Let K_x = U_x C_{ox_x}(W/L)_x

    I_{tail} = K_{tail}[V_{ov}V_{x} - \frac{V_{x}^2}{2}](1 + \lambda V_{x}) or I_{tail} = K_{tail}\frac{V_{ov}^2}{2}(1 + \lambda V_{x})

    I_{D_p} = K_{p}[V_{ov}(1.5 - V_{out}) - \frac{(1.5 - V_{out})^2}{2}](1 + \lambda (1.5 - V_{out})) or I_{D_p} = K_{p}\frac{V_{ov}^2}{2}(1 + \lambda (1.5 - V_{out}))

    I_{D_n} = K_{n}[V_{ov}(V_{out} - V_x) - \frac{(V_{out} - V_x)^2}{2}](1 + \lambda (V_{out} - V_x)) or I_{D_n} = K_{n}\frac{V_{ov}^2}{2}(1 + \lambda (V_{out} - V_x))

    I_{D_n} = I_{D_p} = 0.5I_{tail}

    I feel like I am missing something. How can I solve these?
     
    Last edited: Oct 24, 2013
  7. WBahn

    Moderator

    Mar 31, 2012
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    Since you are dealing with quadratic equations, you at least have a shot at solving things analytically. I don't know if this is what you are expected to do or not.

    But you have three devices that have some constraints that have to be simultaneously met. One method is to perform a load-line analysis and do it graphically (to at least get close). Another method is to do it numerically by guessing a value for one of the parameters and then seeing what the other parameters have to be. You'll end up with at least one parameter that is physically impossible. So then you ask which direction you need to change the parameter you guessed and you guess again. Here, the thing that makes the most sense would be to guess a value of the current and then compute the voltages and see if they are compatible. Based on whether they are high or low you can determine if the current needs to be increased or decreased and then iterate to a solution. Once you set things up, you can do this manually with a calculator amazingly efficiently. But you can also set up a spreadsheet pretty easily and then you can use the goal-seek functionality to find a solution.
     
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  8. Tarquin Hardwicke

    Thread Starter New Member

    Oct 23, 2013
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    Many thanks for your help, WBahn. I was expecting the problem to have a straightforward analytical solution.

    I solved the problem using two nested loops sweeping V_OUT and V_X. The solution was the minimisation of | I_n - I_p | + | 2*I_n - I_tail |. I created a Macro in Excel to do the hard work.

    The values I found were:
    V_OUT = 0.974 V
    V_X = 0.479 V
    I_n = I_p = 0.5 * I_tail = 1.41 mA
     
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