Hello
I have just started studying the ac equivalent circuit of differential amplifier
Please refer to the figure(differential equivalent circuit) attached ,the negative part of vin can be grounded? to continue understand the operating principle, please can someone answer Yes or No? please
Thanks!!!

 

No.

 

I welcome your reply
I understood the text book how the ac equivalent circuit is drawn, I am little bit confused(fig17-13), why the current source direction of Q2 dont'face done like the other(Q1).Something I am missing out!

 

Remember that the AC currents are the incremental currents added to the DC currents to get the total current (small signal analysis is nothing except a formalized application of superposition). As you increase the differential input voltage, the current in the left transistor goes up and the current in the right transistor goes down. Since the total collector current in the right transistor goes down when the input voltage goes up, the AC current source must point in the direction opposite the DC current flow.

 

Thanks
I understood all most your explanation But the quoted I am not 100%sure
"the AC current source must point in the direction opposite the DC current flow."
can you please produce a simple sketch?

 

Thanks
I understood all most your explanation But the quoted I am not 100%sure
"the AC current source must point in the direction opposite the DC current flow."
can you please produce a simple sketch?

Let's do it with math, instead.

At Vin = 0V, the current source output is evenly split between the two transistors. Ignoring the bias circuits that must be present in order to provide the quiescent base current, we thus have

Ic1 = Ic2 = It/2

Do you agree that if Vin is positive, that Ic1 goes up and Ic2 goes down? For small enough values of Vin, we can approximate this as a linear relationship:

Ic1 = It/2 + g·Vin
Ic2 = It/2 - g·Vin

where g is the effective transconductance.

A transconductance can be modeled as a voltage controlled current source, VCCS. Thus Ic1 can be modeled as a DC current source in parallel with a VCCS, such that the currents add when they combined, having a gain of +g while IC2 can be modeled as a DC current source in parallel with a VCCS, such that the currents add when they are combined, having a gain of -g. But we can eliminate the minus sign by simply flipping the VCCS around so that its output subtracts from the DC current source output. When we take just the small-signal model we turn off the DC current sources which effectively removes them from the circuit leaving us with the two VCCS that are pointed in opposite directions (as viewed in that schematic).

 

Many thanks I understood what you wrote !!
a)Regarding fig17-13 the equivalent circuit at the upper part is ground at this point is at 0V(Am I right?)
b)Vout is ic*Rc with respect to ground(Am I right?)
c)ie=iin(current drawn by Vin)+ic where ie~ic therefore ie=ic , ic=Vin/2re', Vout=ic*Rc=Vin*RC/2re'(Am I right?)

 

Many thanks I understood what you wrote !!
a)Regarding fig17-13 the equivalent circuit at the upper part is ground at this point is at 0V(Am I right?)
b)Vout is ic*Rc with respect to ground(Am I right?)
c)ie=iin(current drawn by Vin)+ic where ie~ic therefore ie=ic , ic=Vin/2re', Vout=ic*Rc=Vin*RC/2re'(Am I right?)

Can someone help me!

 

But you already have answered your own questions.

 

Dear all,
Many thanks and good day

 

Hello
Kindly refer to the image attached page600 at the bottom, there is formula Vout=Vcc-ItRC/2, Is Vout with respect to ground or VEE?
Good day
SM

 

We always measured our voltage with respect to ground. Collector voltage is our output voltage with respect to GND.
If we are measure a voltage between to points without a reference to ground. We use this notation "Vab" - voltage difference between point A and B.
For a example Vbe is a voltage between base and emitter.

 

Thanks I learn it!
I am encountering a difficulty of the operating principle of a single supply opamp amplifier circuit as shown scanned book page as says "Because the negative feedback forces Verror to be approximately zero, the inverting input is automatically pulled up to quiescent value of +0.5V."
How the negative feedback feeds the inverting input + 0.5V?
Thanks for your hearing

 

Please spend a little bit of time preparing the image files you upload. Orient them so that they can be read directly (i.e., rotate them if necessary) and scale them so that the sizes are reasonable. This doesn't take much time or effort or fancy software. For instance, consider the following image file that is oriented correctly, is only 90 kB (5% of the original file size), and literally took less than two minutes to download it from your post, rotate and scale it using Paint, and upload and insert it in this post. If you want people to help you for free, you need to be willing to put in a bit of effort to make it easier for them to do so. Otherwise they will just move on to someone's where that effort WAS put in.



Notice that the text doesn't say that the negative feedback forces the voltage at the inverting input to 0.5V, it says it forces it to 0.5·Vcc, which is 7.5V in this case. As for how it does this, well, what is the DC voltage on the non-inverting input? What does a properly configured opamp do as a result of the negative feedback?

 

Sorry for my mistake I copied wrongly, again sorry
a) what is the DC voltage on the non-inverting input? 7.5V or 1/2Vcc
b)What does a properly configured opamp do as a result of the negative feedback? to have stable voltage gain of 1+R1/R2
"Because the negative feedback forces Verror to be approximately zero, the inverting input is automatically pulled up to quiescent value of +0.5Vcc."
How the negative feedback feeds the inverting input + 0.5Vcc?Something I missing out!

 

Sorry for my mistake I copied wrongly, again sorry
a) what is the DC voltage on the non-inverting input? 7.5V or 1/2Vcc
b)What does a properly configured opamp do as a result of the negative feedback? to have stable voltage gain of 1+R1/R2
"Because the negative feedback forces Verror to be approximately zero, the inverting input is automatically pulled up to quiescent value of +0.5Vcc."
How the negative feedback feeds the inverting input + 0.5Vcc?Something I missing out!

It appears the something that you are missing out is basically the very first thing that you should have learned when you started learning about opamps.

The output of the opamp is the difference between the two inputs multiplied by a very large gain factor. If that gain is 100,000 (on the low side for most modern amps), then if you have rails that go between -10V and +10V the maximum voltage difference between the inputs is only 0.1 mV before the output saturates. You then design the circuitry around the opamp so that if the differential input voltage goes up that the increasing output voltage tends to drive the differential input voltage down (and vice versa). That's negative feedback.

 

many thanks, I know this, the thing that is confusing me is why verror is zero(v1-v2) when when vin is 0.5vcc(potential divider) and Vinverting is (0.5vcc)(1+R1/R2 or B), vin inverting =BVout=0.5Vcc, how it can happen?

 

many thanks, I know this, the thing that is confusing me is why verror is zero(v1-v2) when when vin is 0.5vcc(potential divider) and Vinverting is (0.5vcc)(1+R1/R2 or B), vin inverting =BVout=0.5Vcc, how it can happen?

What is B?

At DC (remember, capacitors look like open circuits at DC!), what is Vinverting in terms of Vout?

 

sorry to be quick I am doing mistakes sorry
B is(R2)/(R1+R2)
I think the bypass capacitor is doing Verror =0

 

Vinverting= Vout(R2)(R1+R2) as the bypass capacitor is open Vinverting=(infinity)(Vout)/(R1+infinity), Vinverting=1*Vout