Device Behavior

Discussion in 'General Electronics Chat' started by Papabravo, Mar 17, 2006.

  1. Papabravo

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    Feb 24, 2006
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    Commonly available comparators like the dual LM393 and its quad brother the LM339 have a specification parameter called "Common Mode Input Range". This parameter is specified, in single supply operation, to be 0 VDC up to Vcc - 2V.

    The first thing that the datasheet says is that if one or both inputs are outside of this range, the part will not be damaged. That's a good thing. The next item from one of the data sheet footnotes is that the output will be in the correct state if either one of the inputs is within the common mode range. OK, not great, but not horrible.

    I understand that when specifications are violated there are no guarantees, but I really would like to know what happens when both inputs are in the Vcc - 2 Volts to Vcc range. Will the comparator change states, according to the relationship between the inputs?

    I think the answer is yes. I think the specification which is not guaranteed under these conditions is the propagation delay. In SPICE simulations, this is the only effect I can observe, using at least three different comparator models. I also know that simulations and models do not always give an accurate picture of what is going on, so I'd be interested to hear anybody's thoughts on the matter.
     
  2. hgmjr

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    It is always best to operate devices within the manufacturer's stated contraints. If either or both of the comparator inputs are likely to exceed the positive or negative supply voltages, it would be best if you either change the supply inputs or adopt a scheme that scales the input to a voltage that is between rails.

    hgmjr
     
  3. Papabravo

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    hgmjr

    I agree. "It is always best to operate devices within the manufacturer's stated contraints." This situation came up because I made a mistake. I did not intend for this situation to exist.

    "...change the supply inputs" -- unfortuneately not an option, standards being what they are.

    "...adopt a scheme that scales the input to a voltage that is between rails."
    The voltage is between the rails, but it is not within the common mode range. I think that is what you meant to say, and I agree this is a possible way to go.

    The reason I asked the question was to understand the behavior under the stated conditions. I feel it is necessary to understand a situation before deciding what if anything to do about it. If in fact the only penalty of exceeding the common mode input range with both signals, is an increase in the propagation delay time from 2 usec. to 6 usec., then I think I would prefer to live with that situation since, in the application, that change in propagation delay is completely irrelevant.

    I get absolution elsewhere. Here I'm just looking for a deeper understanding of the device behavior.
     
  4. hgmjr

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    I see now that your problem is excessive common mode on an otherwise good signal.

    In this case it sounds like you will just need to prototype the circuit and subject it to the anticpated worse-case common mode scenario to see what happens.

    Since this comparator is available from more than one manufacturer, you may find that the device from manufacturer "A" exhibits a different behavior than the same device from manufacturer "B". For this reason you may want to get samples from the various manufacturers of the device and subject them to the same test.

    Good Luck,
    hgmjr
     
  5. Papabravo

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    We have the circuit on a batch of PC boards. Empirical evidence to date suggests that the output does not go to the wrong state even when both inputs are outside the common mode range, that is within two volts of the positive rail.

    Empirical evidences also suggests that the increase in propagation delay is real and measureable and consistent with the results of at least one of the SPICE models that I have tried.

    The comparators that are mounted to boards are LM393 duals from Texas Instruments.
    I will check to see if we have parts from other manufacturers. Thanks for the suggestion.

    All that aside I'm still quite interested in understanding the mechanism which leads to the increase in propagation delay, and in understanding if there is a failure mechanism that will cause the output to go to the opposite state that would be expected from the relationship of the two inputs.
     
    Last edited: Jan 27, 2016
  6. n9352527

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    Oct 14, 2005
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    SPICE models of comparators and opamps are not guaranteed or verified outside their normal operating regions. Boyle or Boyle like models are worse in these areas because they are parameterised models. Subcircuit based models are better, but they are still not 100% accurate because no one wants to waste money verifying them to work outside the normal regions.

    I guess what I am trying to say is, outside the specified operating regions, SPICE simulations do not worth anything and should not be taken into considerations or be used to infer any real device behaviour. They could either be accidentally accurate, way off, or just plain accurate. There's just no way to be 100% sure.

    <!--QuoteBegin-Papabravo
    @Mar 17 2006, 09:02 PM
    All that aside I'm still quite interested in understanding the mechanism which leads to the increase in propagation delay, and in understanding if there is a failure mechanism that will cause the output to go to the opposite state that would be expected from the relationship of the two inputs.
    [post=15115]Quoted post[/post]​
    [/quote]

    Your best bet is to get hold of the transistor-level circuit of the comparator and do a rough operational analysis for the regions that you are interested in.

    hgmjr is right, opamps that have the same p/n but from different manufacturers do not have the same implementation circuit. Worse, if some crucial parameters that affect the regions that you are interested in are also affected/controlled by the manufacturing process then different batches from the same manufacturer opamps could exhibit different behaviours too.
     
  7. Papabravo

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    I do have a transistor level circuit of the comparator, but with little or no experience in IC design, some guidance in interpreting the symbols and the circuit topologies would be helpful. These transistor level diagrams, like SPICE models, may be incomplete, inaccurate, and or misleading with respect to my area of interest.

    If that is the only path to enlightenment, then soldier on I will.
     
  8. n9352527

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    You are right. Manufacturers rarely include complete transistor-level circuits for the obvious reason of protecting their designs. Is your SPICE model subcircuit based? If it is then try comparing it with the transistor-level circuit that you have. Good correlation between them would, at least, suggest there is some degree of accuracy in them.

    I still think analysing the circuit is the best way to go. Look for the obvious like violations in operating conditions like bias voltages, quiescent points, swing limitations etc. that would affect the comparator in that specific region. Delay suggests some form of latching up, where one or more parts of the circuit react so slow due to incorrect conditions.

    Why don't you post the circuit here and see if there's a member that could help you further?
     
  9. hgmjr

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    Hi Papabravo,

    I found a datasheet from TI that I think sheds light on the reason that the positive common-mode range is restricted. It appears that TI has designed the input stages using two PNP transistors (ala darlington) in each leg of the differential input stage. That would mean that as the inputs approach within 2 volts of the positive rail, the source of current that drives the PNP emitters would begin to drop below the level needed to sustain the input differential stage.

    Take a look at the datasheet and see if you agree.

    TI LM393 datasheet.

    Just scroll down to item 15 and open the pdf datasheet. Page 2 of the datasheet shows the typical input stage of the TI device.

    hgmjr
     
  10. Ron H

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    Apr 14, 2005
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    The On Semi LM393 datasheet has the most detailed schematic I could find. I took the input stage from that and set up a simplified schematic in SwitcherCAD, scaling the PNP current sources to the levels in the Philips schematic. The sim shows that the tail current of the diff input pair remains pretty much constant at 100uA until the common mode input reaches about 1 to 1.2V (depending on relative transistor sizes, which we have no info on) below the positive rail. As the input rises beyond that, the current rapidly drops. Within another 100mV, it has dropped to half. Another 100mV, and it is essentially zero. As you surmised, I believe the drop in tail current will correspond to an increase in propagation delay. However, the drop is so precipitous that the change in delay isn't really relevant.
    Whether this is accurate or not depends on how closely the schematic matches reality, and on whether using 2N3906 as a model is close enough. I think it's probably a pretty close match to reality - but I could be wrong. :(
    I would not count on it working outside the specs, but if you are desperate, you might cross your fingers and get away with Vcm good to Vcc-1.5V.
     
  11. Papabravo

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    Thanks for the explanation. I will check those schematics. The SPICE models are Subcircuit Models.

    Is tail current the constant current that needs to flow so that the differential input stage can detect the voltage difference between the (+) and the (-) inputs? This would be consistent with the data sheet statement that the output state will be correct if one of the two inputs is within the common mode range. If both inputs are outside the common mode range, and the tail current drops to zero, will the open collector transitor favor the OFF state, or the ON state, or is the output unpredictable?
     
  12. Papabravo

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    Duplicate Post - Delete
     
  13. Ron H

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    I looked at the schematic and concluded that the output would be ON when the CM voltage gets too high. I went ahead and simulated the whole circuit and verified this. If you want, I could post my schematic and waveforms. If I do, which is best - as an IMG, or as an attachment?
     
  14. Gorgon

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    Aug 14, 2005
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    Hi,
    Please take care to limit the current when you are close or outside the limits. We use the 339 in a product at work, and due to some spec changes needed to replace a fixed resistor for a pot. Sometimes the engineer turning the pot the wrong way and went outside the range and let out the blue smoke from the 339, when hitting the endstop.

    TOK ;)
     
  15. Papabravo

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    I guess I would prefer the ASC file since that would allow me to run it myself. With the IMG file I'd have to reenter the whole schematic.

    Turns out that ON is the incredibly lucky answer. As one of the signals is drawn down into the common mode range, the output goes OFF (and is pulled up) which is the behavior that I need.

    I think I owe you big time for tackling this question.
    Thank you masked man!
     
  16. Ron H

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    Papabravo, I'll unmask myself. I'm a 65 year old design engineer, mostly analog. As you might guess, I've been around the block a few times. Right now I work for the only DRAM mfr in the US (guess who), but I spent most of my career designing TV video circuitry at the board level.
    As you know, I'm pretty new on this forum, but I'm an old troll on some of the others. I'll try to post the .ASC file here. Some forums have restrictions on file extensions. I guess I'll soon learn if this one does.
    BTW, if it turns out that I haven't led you down the garden path - you're welcome. I do this becauseI like electronics, but my current job doesn't allow me to do what I enjoy most. I stay at it because it is low stress, pays well,and I'm close to retirement.
    If you can, let us know how this all comes out.
    UPDATE: The forum won't accept .ASC files. I could probably zip it, or post it as code, but I'll just rename it as a .TXT. Change it back when you download it.

    Cheers,
    Ron
     
  17. Papabravo

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    Well...I'll be 58 at my next b'day and I've spent most of my career doing software, and firmware, and microprocessor, and logic design. I love this stuff so much I could never bear to move into sales, or marketing, or management. I need my technology fix each and every day. I do have some analog wings, but I like to think I know when I'm in over my head.

    Thanks again for the file. I'll let you know how it comes out.
     
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