Developing a Transition Table based on a Schematic

Discussion in 'Homework Help' started by czorn, Feb 9, 2011.

  1. czorn

    Thread Starter New Member

    Jan 26, 2011
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    I have a HW question that asks me to determine count for a synchronous counter based on a schematic. I know how to develop the circuit based on a desired count but I don't know how to work backwards.

    Please look at the attached file and provide me with a way to get started.



    Thanks
     
  2. Georacer

    Moderator

    Nov 25, 2009
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    A methodical way to solve this is to start from a given state (0000) and work simultaneously with all of the 4 outputs. Make the state you find in each step as current and start over. Here's what I mean:

     \left[ \begin{array}{c|c} \text{Current States} & \text{Next States} \\<br />
\hline\\<br />
\text{WXYZ} & \text{W'X'Y'Z'} \\<br />
\hline \\<br />
0000 & 0001 \\<br />
0001 & 0010 \\<br />
\ldots & \ldots \end{array} \right]<br />

    Do you understand my methodology? If finding the next state confusing, try adding more columns to create intermediate steps for each line.

    Is that clear?
     
  3. t_n_k

    AAC Fanatic!

    Mar 6, 2009
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    You know each of the current JK output states which are presented through logic conditions to the JK inputs.

    At the start W=X=Y=Z=0 and hence W'=X'=y'=Z'=1

    So JK flip-flop W has current inputs J=XYZ=0 & K=YZ=0. Based on the JK function, you can then predict the resulting states of W[Q] and W'[Q'] at the next clock cycle. Do this for each flip-flop and then you will have the current states for the successive clock cycles - and so forth, until you have a full sequence of possible states W,X,Y,Z.
     
  4. Georacer

    Moderator

    Nov 25, 2009
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    Remark: t_n_k uses the form X' to denote the complement of X. In my table X' is used to denote the next value of X.
     
  5. czorn

    Thread Starter New Member

    Jan 26, 2011
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    Georacer- I understand what you are saying about sequentially moving the active bit, and propogating the next state table. However, what is unclear is, that by taking that method we are sequentially just counting up. What if this count happened to be 0,3,7,.... and wasn't sequential? I know in this case it is sequential, but I also know it isn't a MOD16. So if I take your approach I wouldn't get the correct Modulus count for this circuit. Does that make sense or am I not understanding what you were saying?

    t_n_k- so I see what you are saying about the W=X=Y=Z=0 & W'=X'=y'=Z'=1. Let me ask you this, the change in output wouldn't be until the next clock cycle? So for instance on end of CLK cylce 1 Z goes high, but Y won't go high until end of CLK cycle 2, and finally Y & Z won't both go low until the end of CLK cycle 4. So the change on inputs J & K isn't detected until the next clock cycle?
     
  6. Georacer

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    Nov 25, 2009
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    As FFs are used, any changes won't happen until the next clock cycle.
    I didn't suggest to count up in the Current State column. I told you to start with 0000 (as suggested by the exercise) and then continue with the state you go to, on the next clock cycle.
    That way, depending on the circuit, you might get 0,1,2,3... or a Fibonacci sequence. However, the count will always be sequential and have a steady period because that all you can do with a circuit made up from FFs.
     
  7. czorn

    Thread Starter New Member

    Jan 26, 2011
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    Georacer: now I understand what you meant. I was hoping there was some tool I could use, something like a reverse k-map to make it easier, but I guess no such luck.
     
  8. Georacer

    Moderator

    Nov 25, 2009
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    You can't backtrack the Karnaugh map, because that tool doesn't dictate how you will implement your sequence. Even if you have a ready-made State Table, you can implement it by using either FFs, counters, simple gates, MUXs etc.

    The process isn't formulated, and therefore can't be backtraced.
     
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