Determining transistor to use for pSpice Simulation

Discussion in 'Electronics Resources' started by XcKyle93, Dec 11, 2013.

  1. XcKyle93

    Thread Starter New Member

    Dec 11, 2013
    Hey all,
    I lurk the forums a lot, but this is the first post that I've ever made. I am attempting to replicate the simulation results from a paper published in 2000:

    If you can't access it, the paper is called "New 4-transistor XOR and XNOR Designs." It focuses on a powerless/groundless XOR/XNOR design that is (was) efficient in terms of power consumption. They display simulation results in HSPICE, but the authors don't go into specifics as to what transistors they used for simulation.

    In a technical report by the same authors (using the same design), they reported that transistors with a channel length of 0.6u and a channel width of 2.4u using 3.3 volts logic, but I feel like I need more details than that. My plan is to use the Nbreak and Pbreak transistors in pSpice by editing their respective pSpice models and copying and pasting the corresponding transistor parameters from some library file. However, if I don't know what type of transistor to use, how would I be able to find a library file for it?

    I am not particularly skilled with pSpice, and I don't have much experience with transistors, so any help would be wonderful!