I am attempting to study for a final and we need to "Design the sequential circuit specified by the state diagram below using D flip-flops." I dont recall having went over this at all in class... Anyone have a link to a tutorial or such that breaks this down, and how to redraw the machine???


thanks
zack

 

I almost positive that the instant you post some of your own work toward the answer, you'll get some help from somebody.

 

Q not feeds into D, this makes a simple clocked flip flop.

Q feeds into D of the next flip flop, with all the clocks tied together, this makes a simple sequencer. Every clock pulse shifts the input to the first D input down 1.

Volume 4 of the AAC book.
Chapter 12: SHIFT REGISTERS

What are you specifically trying to do?

 

Ok, ill take a look at that link, thank you.

but

this is the exact problem, i have read what they do in my book and still am lost.

i think i need to first get a EXCITATION equation( which I dont know exactly in the samples they get them). then from there make a TRANSITON table and a STATE table, and then a STATE/OUTPUT table.... which all of these im unsure of...

and from there i need to re draw using D-FLIP FLOPS.

I think this is some type of Moore Machine.. but im not completely sure

 

Q not feeds into D, this makes a simple clocked flip flop.

Q feeds into D of the next flip flop, with all the clocks tied together, this makes a simple sequencer. Every clock pulse shifts the input to the first D input down 1.

Volume 4 of the AAC book.
Chapter 12: SHIFT REGISTERS

What are you specifically trying to do?

Does the OP have a picture posted I'm not able to see?

 

kermit2, what is the point of that post?

 

I see nothing but text in your first post, and so I said you needed to show your work. Then Bill responds with words that lead me to believe he sees something there I do not see. Which leads to my post of what I see on my screen.

Do you or do you not have text only in your first post here? I wish to see it too, should it be there, but invisible to me.

Other than that I take it that perhaps you find my posts here irritating in some way?

 

yea, i only have text in my first post...
I just thought you were getting on my case because i didnt show any work... I didnt know where to begin when I first posted, I finally found a powerpoint on the internet that i think somewhat helps, but I only finished the state table, and excitation table so far, i still dont know where to go from there...
sorry for the confusion but im a really slow learner, and slowly trying to make progress... ill try to upload what i have for my two tables though.

 

Nope, but I was referring him to the appropriate areas where he might find the answer himself.

A chapter freshly written but that has not made it to the book yet can be found here...

Submission: Sequential Circuits

 

this is what I do have so Far, Im not 100 percent sure if im on the right track or exactly where to go from here? i see on one part they are using j-k flip flops and they extend the excitation table, and fill it in, not quiet sure how they do that.

http://www.ugrad.cs.ubc.ca/~cs218/slides/218-5.pdf

this is the slideshow that i found that seemed to help somewhat, this is what i based my problem solutions off of.

 

Bill, I skimmed through the link you last sent, I see that in alot of places they use J-K Flip Flops, i have 2 questions...

1) how do they get the numbers to fill in the J-K table part? (ill read through it a bit more and see if i can find out, but so far i dont know where they pull these numbers from)
and
2) how would i do this but with D Flip Flops?

 

I think you need to show us your count sequence before we can go much further.

D type flip flops and JK types are variations (big variations). In many cases they can do similar jobs. D type will sample and hold a digital state, while JK will allow you to vary the exact sequence of a count (so can D type, but it is done differently). JK are used a lot for mod 6 counters, or BCD. A type D is a simple incremental step above set/reset, and a JK has AND gates controlling a clocked set/reset flip flop.

Sorry if I'm not clear. Is that diagram you showed the states you want? It has been 30+ years since my college classes, so I'm not as sharp on that part of the subject as I used to be.

 

Ok thanks, but its cool, the 4th post, where i show the state diagram, thats the whole question/problem... and we have to start from there and do all the tables and such to figure out what the exact circuit looks like, then draw it... let me read some more of the link you sent me, and I will see what i can come up with.

 

Your state table looks good. Move on to the step 5a of the FSM tutorial.
It covers the D-FFs too, so don't fret.