Designing Of LVSCR Circuit

Discussion in 'General Electronics Chat' started by Rishi.bond007, Jun 2, 2010.

  1. Rishi.bond007

    Thread Starter New Member

    May 14, 2010
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    Hey!
    I want to make A Low Voltage SCR Circuit Of certain output pulse.
    Basically it is a firing circuit. Can anybody guide me how to design the circuit?
    OR suggest me any book or any reference where I can find how to design these types of circuits.
    Thanks

    Rishi
     
  2. bertus

    Administrator

    Apr 5, 2008
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  3. Rishi.bond007

    Thread Starter New Member

    May 14, 2010
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    Hey,
    Thanks for suggestions...
    I am attaching my circuit diagram... I can't understand the roll of Capacitor C1 and C2 here...
    and can anybody give me the analysis of the circuit....
    Plz help me...
     
  4. Rishi.bond007

    Thread Starter New Member

    May 14, 2010
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    Reply me ...
    i need some help... :-(
     
  5. t_n_k

    AAC Fanatic!

    Mar 6, 2009
    5,448
    782
    It's a rather curious circuit and you haven't given much specific information on what happens in the circuit. As a pulse generator it's not the most predictable in terms of behaviour.

    What's the intended function of either the key switch or the oscillator?

    At best I can only conclude that ....

    1. Before the gate is triggered [& SCR is off] - say by depressing the key switch - C2 charges via R2 to Vcc.

    2. On triggering, the SCR switches the top terminal of capacitor C2 effectively to the top of R3. So the output voltage will instantaneously switch from 0V to (Vcc-Vf). Vf being the SCR forward on state voltage drop ~2V.

    3. With time, C2 partially discharges via the SCR through R3 and will tend towards a steady state value of approximately R3*Vcc/(R2+R3) - ignoring Vf.

    4. From then on it's a bit speculative as to what happens. If the SCR holding current is less than Vcc/(R2+R3) then the SCR wont turn off - so one would therefore presume that Vcc, R2 and R3 are selected such that the SCR will turn off at some point in the C2 discharge cycle.

    5. I note that the C106D SCR has a holding current (Ih) as low as 190uA. So, provided Vcc, R2 & R3 are correctly chosen, the SCR will turn off at the point where the SCR on-state current falls below Ih. This determines the output pulse duration.

    6. C1 in combination with R1, R4 & R5 would determine the overall shape and duration of the key switch initiated gate pulse.

    7. How "input to oscillator" fits the picture I'm not sure. I'm guessing that it gives the option of running from a continuous triggering source rather than a manual trigger.
     
  6. Rishi.bond007

    Thread Starter New Member

    May 14, 2010
    4
    0
    Thanks a lot man....
    Surely it'll help me....
    Thanks again.. :D

    Rishi
     
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