I'm working on designing a JFET amplifier for a project for my class. I have a schematic, and some guidelines, but I'm not too sure that the schematic and my results make sense. I posted an image of what it should look like, except replace the transistor with a N-channel JFET (2n3819). Should be common source. My first question is: can I have an upper and lower resistor for the source transistors with only one being bypassed? I've seen most CS configurations with just one source resistor in parallel with a capacitor, but my professor gave us this design
Right now, I have an Idss of 10mA, Id of 1mA, Vp of |-4|, Vgs = -2.735, so my gm = 1.581.
I want to get a gain of -3, in using an ac analysis. For an ac equivalent circuit, I think u = gm*rd, where u is the amplification factor, rd is the output resistance. For some reason, during calculation I find that u and rd become negative quantities, does this seem incorrect? I can provide all circuit component values if needed, and I will try to draw the equivalent small signal circuit so I can post it here.
Thanks for the help, please let me know if I should clarify anything.
Right now, I have an Idss of 10mA, Id of 1mA, Vp of |-4|, Vgs = -2.735, so my gm = 1.581.
I want to get a gain of -3, in using an ac analysis. For an ac equivalent circuit, I think u = gm*rd, where u is the amplification factor, rd is the output resistance. For some reason, during calculation I find that u and rd become negative quantities, does this seem incorrect? I can provide all circuit component values if needed, and I will try to draw the equivalent small signal circuit so I can post it here.
Thanks for the help, please let me know if I should clarify anything.
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