can u plz tell me how to solve this question..
Please design a counter that counts the number of times the
number 5 appears in an 4-bit input stream. The I/O are as follows:
NumberIn : 4-bits wide (input)
Start: Reset counter and overflow flag to zero while start is high (input)
Count: 8-bit unsigned count (of the number of 5s that have occurred since start went
low (output)
Overflow: Goes high if count overflows (count is unsigned, so you only need to monitor
the adder carry out) and stays high until start is re-asserted.
Design this functional unit down to the logic (gate) level. An adder is required you can represent
this as a + unit no need to design its detail. There is no need to optimize the design.
The only flip-flop you can use is a D flip-flop, and its clock input can only be connected
to clock. You can NOT use a flip-flop with preset or clear. Muxes and adders can be
drawn as single blocks, you do not have to design their internal structure.
Please design a counter that counts the number of times the
number 5 appears in an 4-bit input stream. The I/O are as follows:
NumberIn : 4-bits wide (input)
Start: Reset counter and overflow flag to zero while start is high (input)
Count: 8-bit unsigned count (of the number of 5s that have occurred since start went
low (output)
Overflow: Goes high if count overflows (count is unsigned, so you only need to monitor
the adder carry out) and stays high until start is re-asserted.
Design this functional unit down to the logic (gate) level. An adder is required you can represent
this as a + unit no need to design its detail. There is no need to optimize the design.
The only flip-flop you can use is a D flip-flop, and its clock input can only be connected
to clock. You can NOT use a flip-flop with preset or clear. Muxes and adders can be
drawn as single blocks, you do not have to design their internal structure.