Hello all,

I was wondering if you guys could help me out with something. I have a circuit carrying a logic signal, +5V or 0V, and I need to add a component such that when the voltage is transitioning from low to high it has very short prop delay (< 200 nanoseconds or so), but when it is transitioning from high to low it gets delayed, maybe by 5 microseconds or so. Any thoughts?

 

Hello all,

I was wondering if you guys could help me out with something. I have a circuit carrying a logic signal, +5V or 0V, and I need to add a component such that when the voltage is transitioning from low to high it has very short prop delay (< 200 nanoseconds or so), but when it is transitioning from high to low it gets delayed, maybe by 5 microseconds or so. Any thoughts?

Assuming you are attempting to make the transitions more abrupt, look into Schmitt triggers. Namely, a Schmitt trigger buffer, or two inverters....

Edit: Sorry, I just reread the post... So a Schmitt trigger would work on making abrupt transitions. Would charging a discharging/capacitor work in your application?

 

Assuming you are attempting to make the transitions more abrupt, look into Schmitt triggers. Namely, a Schmitt trigger buffer, or two inverters....

Well it's state dependent so hysteresis isn't really an issue, the signal is coming out of an AND gate so it's either high or low, but I need one transition to take longer than the other one.

Edit: Sorry, I just reread the post... So a Schmitt trigger would work on making abrupt transitions. Would charging a discharging/capacitor work in your application?

Yes, but, only if I can make it so charge up time from 0V - 5V is =/= charge down time from 5V - 0V

 

Are you looking to delay the transition, which would essentially ramp up to a voltage, or are you just wanting the transition delayed from where it would normally be?

 

It's just a digital signal, so if it's transitioning from high to low, it needs to get a few microseconds of prop delay, but if it's transitioning from low to high, delay needs to be minimal.

 

It's just a digital signal, so if it's transitioning from high to low, it needs to get a few microseconds of prop delay, but if it's transitioning from low to high, delay needs to be minimal.

If that's the case, you could input a buffer, buffer charges a cpacitor, and teh capacitor goes to the input of a Schmitt triggered buffer, with the trip-up voltage set to close to Vdd and trip-down voltage to slightly less, given the impulse response of a capacitor, the transition point to a low output is shortly after the transition, using the step response, the capacitor will take some time to get up to the trip-up voltage of the Schmitt trigger.

 

I am curious, why would you want to do this?

 

If I get too much current, I have a transducer that sends a signal to break the circuit in 2 different places. But they need to open/close in a different order.