De-multiplexing of address and data lines

Discussion in 'Programmer's Corner' started by jayec1a, Feb 28, 2012.

  1. jayec1a

    Thread Starter New Member

    Feb 28, 2012
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    hi!! i want to understand the de-multiplexing process that separates the lower ordered AD0-AD7 into address and data lines
     
  2. nigelwright7557

    Senior Member

    May 10, 2008
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    On the 8051 in a write it first it puts out A0-A7 and that is put into a 8 bit latch then it puts out the data on AD0-7 and the high address on to the buses.
     
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  3. Georacer

    Moderator

    Nov 25, 2009
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    The uC has 8 address bits output and one latch control, say E. An external 8-bit latch is mounted onto the address bus.

    At first the latch control is LOW, and the lower 8 address bits are driven onto the address bus. A moment later, E goes HIGH and the latch "locks" its data permanently. Then, the uC can use the address bus to either display the 8 higher address bits, or use the bus to display data.

    Is that clear?
     
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  4. jayec1a

    Thread Starter New Member

    Feb 28, 2012
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    thanx for the replies:)
     
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