Darlington Transistor output

Discussion in 'General Electronics Chat' started by baseball07, Aug 25, 2008.

  1. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    Hi there everyone I have a simple transistor amplifier question. I have the following amplifier with using NPN darlinton transistors. I am using the output of a photodiode at low frequency square pulses as the input as a test, then scope the output. I notice that the pulses reach VDD but then don't quite reach 0V on the low. It goes down to about .65V. How can I ensure that it reaches 0V?

    FYI this amplifier is used for digital applications, not analog.

    Also, is it necessary to add a capacitor at Vin to filter out unwanted DC signals? If so what would be an appropriate value?
     
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  2. SgtWookie

    Expert

    Jul 17, 2007
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    If you want the output to reach nearly 0v, then you need to use a MOSFET.

    Try a 2N7000. They come in a TO92 package, and are quite inexpensive.

    the resistor network on your base is really more for a linear application - unless the 15k resistor is actually the photodiode. A Darlington is not linear; it's basically a switch. Gain with a Darlington generally starts at somewhere around 500 and goes up; some have a gain over 20,000.

    Darlington transistors are generally quite slow. A 2N7000 has turn on and turn off time of 10nS. With Vgs=4.5v, Rds is typically <2 Ohms. The threshold gate voltage is from 0.8v to 3v. It would be a snap to drive with a photodiode.
     
  3. AchMED

    Active Member

    Aug 5, 2008
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    The darlington will spec a saturation voltage in it's data sheet for a given base current.You aren't likely to get much better then what you have.
    If your trying to get it down to 0.2 or less you could use a small logic level FET like the NTS4001.For a FET Vds is dependent on the Rdson,for the NTS4001 Is about 1.6 ohm's at a junction temp of 125 Deg C.for your 25mA This would give a worst case Vds of about 40mV.This FET has extremely simple drive requirments,1.3nC max.

    Code ( (Unknown Language)):
    1. http://www.onsemi.com/pub_link/Collateral/NTS4001N-D.PDF
     
  4. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    Ok thanks I will check it out. Is there any other transistor configuration that will allow it to go to 0? It doesn't have to be darlington, that is the only way I know how to connect transistors together in an amplifier.
     
  5. SgtWookie

    Expert

    Jul 17, 2007
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    Connect the emitter to a negative voltage.

    Even FETs won't go all the way to 0v; they'll get close if you use a large resistor on the drain. But for logic circuits, you really don't need to go all the way to 0v.

    With TTL, anything under 0.8v is considered a 0, and anything above around 2.8v is a logic 1.

    With CMOS, things are a bit different. If the input to the IC is a Schmitt trigger, then anything below 1/3 Vdd is a logic 0, and anything above 2/3 Vdd is a logic 1. If it's not a Schmitt trigger input device, then it's more like 1/10 Vdd and 9/10 Vdd; and make the transitions between low and high levels as brief as possible.
     
  6. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    Ok thank you. Will the emitter follower configuration be better for logic applications?

    Also, would .22uf capacitor be ok to add to Vin to filter out unwanted DC noise?

    Thank you!
     
  7. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    I just tried adding negative voltage to the emitter, but the circuit seems to work better with the emitter tied to ground. My logic circuit is still doing funny things, even with brief high/low transistions at high frequencies. Is there anything I can add to my circuit that will fix this? The low is under .8V so it should technically be working perfect. What could be wrong?

    The input is not schmitt trigger, its a D Flip Flop.

    Thank you!
     
  8. SgtWookie

    Expert

    Jul 17, 2007
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    Not necessarily.
    While you can get down to ground that way, you'll lose maximum Vout. For an NPN transistor, the emitter will be 0.6v to 0.7v lower than the input on the base. Emitter followers are very useful for presenting a light load to an input signal.

    You really don't want to use a cap that large, as you will slow the transition times. You might use a very small cap (on the order of picofarads) to quiet resistor noise.

    It is good practice to use bypass capacitors from ground to Vcc on logic ICs, and across the supply busses in discrete transistor circuits. This reduces noise on the supply.
     
  9. SgtWookie

    Expert

    Jul 17, 2007
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    How did you add the negative voltage? A battery?
    Try adding bypass capacitors across the Vcc/Vdd and ground terminals of your flip flop. 0.1uF is a typical value. You could add a 1uF as well, but the 0.1uF should be closest to the IC, and have leads as short as practically possible.
    What technology, TTL/CMOS? What is the exact part number?
    The absence of a Schmitt trigger input means that you must spend as little time as possible in the "transition" area, which is between the high/low voltage levels I mentioned a couple of posts back. Without a Schmitt trigger input, voltages in the transition area are indeterminate, and can cause oscillations at very high frequencies.

    One convenient way to avoid this is to use an interface IC that does have Schmitt-trigger inputs.
     
  10. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    I used another power supply I had. Worked better when tied to ground.

    It is 74 series TTL IC. The 7474. All my logic ICs are 74 series.

    I tried adding .1uf caps as bypass capacitors to the flipflops (Thank you by the way I never knew about them I am new to electronics :) ) but that didn't seem to help.

    I forgot to mention this, the circuit works perfect when I use the function generator directly as the input, but then circuit gets funny when I add the photodetector. Somewhere between the photodetector/amplifier/Dflipflop input there is a problem.

    The photodetector is a UDT PIN-10D Si photodiode.

    Anything else it could be?
     
  11. SgtWookie

    Expert

    Jul 17, 2007
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    OK.
    Draw up a complete schematic of your circuit as it is now. Right now we just have a fraction of your circuit. However, it sounds like your circuit is spending too much time in the "indeterminate" zone (between 0.8v and 2.8v) which is causing it to oscillate.

    Using a Schmitt-trigger gate in front of your flip-flop would likely fix things, but let's take it slow.
     
  12. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    Here is essentially what I have. Function generator-->LED-->photodiode-->DFlipFlop-->logic block. Somewhere before the flip flops I am having problems, only when the photodiode is connected though. With the photodiode, I have the anode attached to 5V and the cathode as the input to the amplifier. The output peaks of the amplifier look nice, they peak at 5V and go low at .7V.

    The transistors are NPN.
     
  13. SgtWookie

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    Jul 17, 2007
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    Looks like your PIN is being biased the wrong way.

    Try it like the attached. Vout goes to the D-flip-flop clock in.
     
  14. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    I made a mistake, I have mine biased like yours, the anode is connected to ground and the cathode to 5V (it is reverse biased for photoconductive mode?). I would see nothing work if it were the other way around. So this means I need to try adding a schmitt trigger before the DFF input? Would 74310: Octal Buffer with Schmitt trigger inputs work? Is there any particular reason why I didn't need this when the function generator was the input?
     
    Last edited: Aug 28, 2008
  15. SgtWookie

    Expert

    Jul 17, 2007
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    Yes, it is reversed biased for photoconductive mode.

    It would likely have the Darlington turned ON all of the time, which would give a logic low output.
    That sounds like the next logical step to me. An SN74LS14 hex Schmitt-trigger inverter should do the trick. If you need the output non-inverted, you could use two of the gates.

    What is the exact part number? I can't seem to locate a datasheet with a quick search of the part number you've supplied.

    The output from the Darlington may be very slow-rising. This would keep the input to the D flip-flop at an indeterminite logic level (between about 0.8v and 2.8v) which can make it oscillate at very high frequencies, or simply consume a great deal of current. The easiest way to fix this problem is to use a Schmitt-trigger input gate/buffer/inverter. The Schmitt-trigger takes a waveform that may be slow rising or slow falling, and "squares it up".

    You may also be able to use a CMOS gate like a CD4093B Schmitt-trigger quad NAND or CD40106B Schmitt-trigger hex inverter. They can drive up to two LS inputs.
     
  16. baseball07

    Thread Starter Active Member

    Apr 24, 2007
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    Beautiful!!!! Schmitt trigger works great. Why is it that darlington output rises so slow?
     
  17. SgtWookie

    Expert

    Jul 17, 2007
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    Darlingtons are much slower than regular BJTs; you have two of them that need to turn on instead of just one. You wind up with a much higher propagation delay.

    However, it's more likely that the light source for your photodiode was causing a problem; getting the Darlington biased in the linear region instead of switching it on and off.

    The Schmitt trigger simply removes the indeterminate voltage levels. Once it gets an input below 0.8v, it keeps it's output at a logic low value until it "sees" an input that is 2.8v or above before it outputs a logic high value. In order to again output a logic low, the input must fall below 0.8v. The transition of it's output is extremely fast.

    Don't forget, the Schmitt trigger IC also needs a 0.1uF bypass capacitor to function properly.

    For each logic or linear IC, you need a 0.1uF bypass cap across it's suppy pins. If it's an IC that can source/sink a good bit of current (like a 555 timer) you will also need larger caps in parallel; anywhere from 10uF to 220uF depending on the load.
     
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