Hi,

how can I determine the bandwidth of a Darlington pair in theory?

is it a product of a single transistor's bandwidth?

I am using BC550 (BJT)

 

Hello therealironman

Make the same question to Google.com:
determine the bandwidth of a Darlington pair in theory,

You'll find a world of information.
I found this:
http://www.radio-electronics.com/info/circuits/transistor/darlington-pair-amplifier.php
In a second

 

I already did a google search and found this link you mention but there is not a bandwidth formula just a notice that the BW is limited. Obviously I did a google search before putting that thread in the forum

 

I don't get the math, but maybe you do. Basically I think it is input capacitance X gain.


http://en.wikipedia.org/wiki/Miller_effect

 

This should get you started:

The high frequency bandwidth of a 2-stage amplifier is:
\(Bandwidth = 1/sqrt((1/Bandwidth_1)^2 +(1/Bandwidth_2)^2)\)

You need to determine the bandwidth of each of the transistors in the Darlington pair as well as the bandwidth of the pair.

These bandwidths are determined from the \( F_t \) of the individual transistors and the frequency determining components around the transistors. This is made a bit tricky because there is Miller capacitance from the output transistor's collector to the input transistor's base.

 

Are you certain that a Darlington pair is equivalent to a two stage amplifier? I'm not. Primarily because the high gain should have a limiting effect on bandwidth and parasitic capacitance should limit high frequency response.

 

Hi,

I also considered the darlington pair as a two stage amplifier and followed this formula

BWtotal=(2^n-1)*BWstage where n=number of stages

for FT=100MHz (BC550) --> BWtotal=3*100MHz=300MHz

but I am not sure neither if this assumption is correct

 

Gain and bandwidth trade off against each other. The way you do a two stage amplifier is to limit the gain in each stage to just what is required in order to preserve bandwidth. When you try for high gain in a single stage you get instability and oscillation.

Joke
Q: What is the best way to design an oscillator?
A: Start with a high gain amplifer

 

Papabravo:

Are you certain that a Darlington pair is equivalent to a two stage amplifier? I'm not.

Pretty certain. Even if you think of one transistor as "just" being an emitter follower, it is still a stage.

Primarily because the high gain should have a limiting effect on bandwidth and parasitic capacitance should limit high frequency response.

If the Darlington pair is used as a high gain emitter follower then I would not expect the bandwidth to be affected a great deal by the external parasitics. If the Darlington pair is used as a high gain common emitter amplifier then the parasitics will have a huge effect.

Of course, great and huge are relative terms that are very much dependent on the frequencies involved. Even an emitter follower is far from perfect at tens of megaHertz.

 

Joke
Q: What is the best way to design an oscillator?
A: Start with a high gain amplifer

An instructor I had in tech school often said:
"Amplifiers oscillate, oscillators don't."

 

BWtotal=(2^n-1)*BWstage where n=number of stages

This is not correct. Take a very simple example. The first stage of a 2-stage amplifier has a bandwidth of a few kiloHertz and the second stage has a bandwidth of several megaHertz. The second stage will have very little affect on the total bandwidth.

 

Besides having no clue about the circuit topology under consideration we don't know if this is an audio application, an RF application, or something else.

It should be a fairly easy simulation to see if any of the proffered formulas match an empirical experiment.

 

It is an amplifier which consists of the following stages :

- darligton pair (common emitter topology)

- two stages of common emmiter

input current signal: square pulse ~10uA and 2.8MHz
desired output: square pulse where low level is <0.8V and high level >2V (2.8MHz)

what I managed to achieve so far is amplification of ~12mA (the least current achieved) and 0 low level - 5V high level output pulse. I am wondering how can I reach ~uA current and amplify it in order to take an output according to the standards suggested above. The entire circuit is supposed to be a transimpedance amplifier which amplifies a current response of a photoreceiver.

 

Hi,

Are you trying to find the bandwidth of a circuit with a Darlington pair, or maybe the transition frequency of the pair?
We should be able to calculate the latter, however the former would require knowledge of the whole circuit itself.

 

Aha! So here is the problem. A square wave at 2.8 MHz. is going to have some very fast edges that will be rich in harmonic content. A transistor or other device that provides gain at 2.8 MHz is going to need a much greater bandwidth to follow the fast edges. I would say the edges will be in the sub 10 nanosecond range which implies a bandwidth in 100 MHz. range.

A garden variety Darlington like the TIP121 probably won't work very well. If it was me I'd be looking at vertical amplifier circuits for an oscilloscope to get you what you need, or maybe an RF preamplifier.

 

input current signal: square pulse ~10uA and 2.8MHz
desired output: square pulse where low level is <0.8V and high level >2V (2.8MHz)

The output specification you give sounds like a "TTL" level signal. I wonder if you would be better off just using a high speed voltage comparator. The 2.8 MHz is well within the capabilities of many comparators. The 10 uA requirement will limit the choices to comparators with low input bias currents.

 

I bet the low currents are matched by equally insignificant voltages as well. Microvolts and microamps is starting to sound like more like an RF preamp with a comparator output.

 

It is a pre-amplifier with TTL output indeed,

how is it possible to calculate the transition frequency of a Darlington pair made by two descete components and if we do that isn't it possible to find BW?

 

I don't think the calculation is either simple or straightforward. The number is probably not quoted on datasheets because it is so poor. Among the problems is the inability of the first transistor to quickly shutoff the base current to the output transistor. This means that the transition frequency of the pair will be worse than either of the two transistors individually.

If that is indeed the case you will always be better off with separate stages coupled appropriately.

You might be interested in the Transimpedance Amplifier with a FET input.
http://cds.linear.com/docs/en/design-note/dn308f.pdf

 

The topology has to be implemented with BJT - BC550