i think both are sameOriginally posted by nanobyte@Oct 28 2005, 12:56 PM
What is the difference between a D-latch and a D-flip flop? Both seem to be doing the same thing; Q follows D.
[post=11317]Quoted post[/post]
Read my post above, they certainly don't do the same things. Flip-flops require clock edges, where as latches only require enabling or disabling. If you consider the output of flip-flops and latches for the same inputs and clock cycle (where for a latch the clock goes to the enable input), you will find that the outputs will be different.Originally posted by isha@Oct 30 2005, 05:15 AM
i think both are same
bcuz they do the same job
[post=11354]Quoted post[/post]
Remember for the flip-flop the input D is latched to the output Q only on the rising edge of the clock. If you look at the diagram, for all rising edges of the clock the input D is low therefore the output Q never changes. (Note, for clarity I have ignored any delays in the timing diagram).Originally posted by nanobyte@Oct 30 2005, 10:11 PM
What's up everybody. Umm Dave, how come in your diagram the Q output for the flip flop is flat. Shouldn't it have some pulses in response to the clock edges (rising or trailing - which ever one it is suppose to respond to)?
[post=11365]Quoted post[/post]
Why do they sometimes referred to D-flip flop as latchFlip-flops are edge triggered, i.e. the output Q will only follow D at the edge of the clock; whether it be rising or falling edge is dependant on the flip flop design.
Latches are transparent in the enable configuration, i.e. if the latch is enabled the output Q will follow the input D for all changes in D - there is no requirement for an clock edge like for a flip-flop.
Authors and manufacturers may differ but I like Dave's definitions.Flip-flops are edge triggered, i.e. the output Q will only follow D at the edge of the clock; whether it be rising or falling edge is dependant on the flip flop design.
Latches are transparent in the enable configuration, i.e. if the latch is enabled the output Q will follow the input D for all changes in D - there is no requirement for an clock edge like for a flip-flop.
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