Does anyone know how to make a clocked D flip flop with reset made out of only NOR gates??

 

the answer to this is simple but first, have u attempted it urself'if so please share your progress.

 

Yes I have tried it by myself..... My schematic is attached...I have a problem though, I would like to use Q' also in my logic realization, but as it is when reset is high, Q resets to 0 but Q not does not necessarily stay at 1, sometimes it toggles....hmmmm.... I think it works fine without the reset, but need a reset in my design

 

sorry theeld,
had some problem so cudnt get to u earlier.
i have little experience of making ff's with gates in practice since my curriculum always kept me away from electronics

are u sure the ckt works fine without a preset or clear.
i dont see the data input to ff get inverted for the other signal.
i have done this on paper once but dont recall it now.
i did it with the help of kernaugh and de morgan .
also from dia it seems that though reset (clear?) causes Q to go low,
the o/p of the Q' is somewhat dependent on the other inputs meaning it does not necessarily go high. this is what i inferred from the dia (didnt solve it on paper)
hope someone more experienced wud guide you.