D Flip-Flop Up/Down Counter

Thread Starter

timeforplan

Joined Sep 21, 2012
5
Below is a 2-bit decade counter which outputs 00, 01, 02... up to 99. I have done that in the breadboard but I still haven't done the circuit that will change the timing increment into 2 (once the SPDT switch connected to the output terminal of the 555 timer is pressed) - meaning the output will become 00, 02, 04... up to 98.

logic.jpg

I have tried designing a 1-bit even number counter using J K flip-flops. I did the state tables and derived the flip-flop input expressions but all I get when I build the circuit in the breadboard is 0, 1, 2, 3. And from what my friend told me, J K flip-flop circuits are highly unstable so I thought about using D flip-flops. But I'm running out of time and I still can't build the proper circuit. I desperately need your help, sirs and ma'ams. Thank you very much.
 

absf

Joined Dec 29, 2010
1,968
One way to do this is to shift the inputs of IC2 74LS47 one bit up....

Rich (BB code):
IC5          IC2
-----------------
             "1" - GND
Q1           "2"           
Q2           "4"
Q4           "8"
Q8            NC
But you need extra gates to make the 74192 carry out to the next stage when Q8="1".

Another way is to use a 74LS86 XOR gate to make a one-input_pulse->2-pulses_out circuit and place it before or after 74LS00 Nand gates.

Allen
 
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WBahn

Joined Mar 31, 2012
29,978
How about leaving the counter alone and multiplying the output of the counter by 2?

I'm thinking you can do that, despite these being decade counters, with just how you wire the outputs to the BCD-7SEG decoders chips -- no additional chips needed at all.

Think of how you multiply a two-digit BCD value by two.
 

Thread Starter

timeforplan

Joined Sep 21, 2012
5
Think of how you multiply a two-digit BCD value by two.
I've considered your suggestion and I constructed a multiplier circuit (using half-adders) for the first bit only. Since the counter outputs 0-9, the circuit I made multiplies a four-digit BCD by two. The output is 0, 2, 4, 6, 8, and these...

Untitled.png

Is there a way to get rid of these outputs?

Also, how do I modify the circuit so that the outputs in the increment-two counter are displayed the same time they should be displayed on the increment-one counter?
 

WBahn

Joined Mar 31, 2012
29,978
I meant to mention this before. You need to stop calling a decimal digit a 'bit'. The term 'bit' is short for 'binary digit' and it means a signal that can take on a value of 0 or 1 (or, in expanded situations, be unknown, 'x', or high-impedance, 'z'. You are talking about about a BCD digit that is made up of four bits.

A BCD multiplier is different from a binary multiplier, so you would need to implement a more complicated multiplier.

But I am (actually, was) talking about using elegance and trickery to perform the multiplication without using any components at all, just changing the routing of the wires that go between the counter outputs and the decoders. The approach I had in mind would have (or, I thought it would have worked) for a 2 digit output, it would not have worked for a 3 digit output. But I subsequently realized that I had overlooked something in my mental picture as I typed. Since it won't quite work, I'm not "doing your work for you" if I go ahead and describe it.

When you take a binary value and shift it to the left by one bit(and replace the rightmost bit with a zero), you effectively multiply it by two. So my plan was to do exactly that for the low BCD digit and then also feed the original third bit (the one with a weight of four) to the lsb of the upper digit after shifting those bit lines as well. There are two problems with this, the value you want to detect from the lower digit is 5, not 4. I knew this, but in my mind I was thinking "greater than four" and hence that you could use that line by itself. You would actually need to AND that line with the lsb to get the right 'carry' signal, which eventually acts as the upper digits lsb. But the real problem is that performing the shift on BCD values of 5 through 9 result in binary patterns, not BCD patterns.

There are a number of ways to deal with this. One is to make a proper BCD multiply-by-two circuit. Another is to make a four-input combinatorial circuit for each digit.

Since I no longer see a slick trick approach, the BCD multipliy-by-two is probably the more valuable route from an educational standpoint. So let's look at that.

When you multiply a decimal value by hand, what do you do at each digit? You multiply the digit by two and then add in any carry from the prior digit. With that value in hand, you then use the least significant digit as your final value for that position and use the most significant digit as your carry to the next digit column. Mathematically, this is:

Given the following digits:

C (Carry in from prior digit)
D (Present Digit)
E (result for the present digit)
F (Carry out to the next digit)

FE = 2D + C

If we use binary operations (which includes doing a bit shift as described previously), the FE is actually a one-byte representation and not two BCD digits. So what we really have is an intermediate result (in binary) which is:

A = 2D + C

A => FE (i.e., it is broken up into BCD digits).

The most obvious way is to do the same thing we do in our heads:

If (A<10) (E = A, F=0} else (E = A-10, F=1 (i.e., (A-E)/10)}

But we can do better than this. We can detect if A will not be less than 10 and do the adjustments before the multiply.

If (D<=4), there will be no problem (regardless of what C is), otherwise we will need to make an adjustment (again, regardless of what C is).

Then, looking at the operations needed when an adjustment is made,

E = A-10
= (2D+C)-10
E = (2D-10)+C

Now, we like to do addition when we can and since we know we are working with a four bit representation (and doing binary math at this point), we can add 16 to this without affecting anything.

E = (2D-10)+C + 16
= (2D+6)+C
E = 2(D+3) + C

So our logic becomes:

if (D<=4) {E = 2D+C, F=0} else {E = 2(D+3)+C, F=1}

Here is where a bit of elegance can come in. With a bit of thought, you can implement this using a special 4-bit adder made up of 3 half-adders and 1 full-adder. Aside from that, I think all you need are two 2-input AND gates. This is per digit, so double all of this for the entire circuit.

Chew on that for awhile and then we can discuss it some more.
 

Thread Starter

timeforplan

Joined Sep 21, 2012
5
Is this right? I tried multiplying some digits by 2 with this, but not all has a correct output. I really appreciate all the hints you're giving me but I can't think any further - I have to pass this project tomorrow but I still haven't figured out how to do this variable increment thing D: If it's not too much, could you post the correct circuit?

1.png
 

WBahn

Joined Mar 31, 2012
29,978
If it's not too much, could you post the correct circuit?
Sorry, but that's way too much and it's not how this works. If someone just gives you the correct circuit and you turn it in for credit as your own work, then you are cheating and almost certainly violating your school's policy on academic integrity.

Consider (1) the likely penalties associated with that, and (2) the possibility that now, or even in the future, someone will come upon this post and have enough side knowledge to determine which course this was for and who you are. It's always possible that your instructor might monitor this and other boards specifically to see what kind of 'help' their students are asking for, and receiving.

I have to pass this project tomorrow but I still haven't figured out how to do this variable increment thing
As cruel as this may sound, if you haven't figured it out by the time the assignment is due, then you don't deserve any credit for it. Keep in mind that, almost certainly, the instructor believes that you should have gained sufficient knowledge and skills through prior coursework, the text, and the lectures to have done this entirely on your own within the time allowed.

Is this right? I tried multiplying some digits by 2 with this, but not all has a correct output. I really appreciate all the hints you're giving me but I can't think any further - I have to pass this project tomorrow but I still haven't figured out how to do this variable increment thing D:

You have several gates that have their outputs grounded. In most simulators, this isn't too serious, but in a real circuit it can, and usually does, cause real problems. You want to tie unused *inputs* to ground (or high), but you need to leave unused *outputs* unconnected.

One option is to go back and try to make your up/down buttons produce two clock pulses. There was a suggestion on how to do that early in the thread. If you still want to follow the approach I suggested, then the following should help.

Let's call the outputs of the BCD counters A[3:0] for the least significant digit and B[3:0] for the most significant. A3 and B3 are the 8's bit of each value, while A0 and B0 are the 1's bit. We'll express the bit values in braces from most significant to least significant. So the output of the counters will be written as:

B,A = {B3 B2 B1 B0} {A3 A2 A1 A0}

We'll use the same idea for the inputs to the 7SEG decoder, except we'll call those D[3:0] for the least significant digit and C[3:0] for the most.

Let's work with some specific examples.

If the current counter output is 21, then we want the decoder input to be 42. So we would have

B,A = {0 0 1 0 } {0 0 0 1}
D,C = {0 1 0 0} {0 0 1 0}

If the counter output was 42, then M,L would have the above pattern and you would want A,B to have the pattern:

B,A = {0 1 0 0} {0 0 1 0}
D,C = {1 0 0 0} {0 1 0 0}

Do you see the pattern? If this were binary instead of BCD, this is all there would be to it. But lets consider when the output of the counter is 27 and we want the input to the decoder to be 54:

B,A = {0 0 1 0} {0 1 1 1}
D,C = {0 1 0 1} {0 1 0 0}

What's different between this situation and the ones before?

Understanding that difference is the key to understanding the solution.
 

Thread Starter

timeforplan

Joined Sep 21, 2012
5
Actually, I've figured it out some hours ago but I realized it wasn't what I needed. What I needed was way simpler than what I'm trying to do - I just paralleled the outputs of the counters to another BCD to 7-segment decoder and grounded the LSB of the 1st BCD digit.

Anyway, this is the circuit I came up with. The 2 AND gates and the 3-input OR gate corrects the non-BCD number whenever it appears at the output terminals
ckt.png

Anyways, thank you very much for helping me out! If you have given me the answer right away, I wouldn't have learned how to build the proper circuit :D
 

WBahn

Joined Mar 31, 2012
29,978
I'm not sure what part of your overall circuit the figure is for. You have two digits to deal with. Is this just for one of them? Is it replicated just like this for the other, too? You have inputs A, B, C, and D. Where are those coming from? The output of one of the decade counters?

You have a bunch of AND gates that either have a input hard tied HI or hard tied LO. What purpose is being served by these gates?
 

absf

Joined Dec 29, 2010
1,968
I think the "A B C D" come from one of the outputs of 74192 so the circuit has to be duplicated for 2 BCD digits to work. "A" being MSB and "D" is LSB.

Though there are a lot of redundant gates. The idea behind its working is sound.

Congratulations, well done.:)

Allen

[edit]
I attached the simplified version of the OP's circuit. "A" is LSB and "D" is MSB. The 7447 is embedded into the 7-segment display.
 

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WBahn

Joined Mar 31, 2012
29,978
I agree that it will work for the LSD, but not for the MSD. There is no provision for any kind of a carry out from this circuit (assuming it is for the LSD) to the other circuit (the one for the MSD), or for a carry in to this circuit (assuming it is for the MSD) from the other circuit (the one for the LSD).

You are very close to having both digits working, but not quite there yet.

It seems like this came about as a result of 'a happening', as one of my professors used to describe it. Well, sometimes that's how we end up with a solution when we can't quite craft a coherent approach and, at the end of the the day, one of Murphy's Rules of Combat applies: If it's stupid but it works, it ain't stupid!

But, when 'a happening' occurs, usually the most valuable part is to see if you can reduce it down to something simpler, that still works, and then understand why the simpler thing works the way it does.

In this case, every logic gate except the three immediately to the left of the 4-bit adder can go bye-bye. Having done that, you can then focus on what role the three remaining gates play. What you will find is that they implement the logic I talked about previously, namely, if the input is greater than four, double the input and add six; otherwise, just double the input.
 

absf

Joined Dec 29, 2010
1,968
Yes, you're right. The circuit didnt quite work as expected. It was counting...
0,2,4,6,8,0,2,4,6,8,10,12,14,16,18,10,12,14,16,18,20.......

I didnt try counting down. I guess it should be the same.

The carry out from LSD to MSD is still not taken care of. The additional circuit is only meant for the LSD.:p

Allen
 

Thread Starter

timeforplan

Joined Sep 21, 2012
5
Here's what I came up with instead of the complicated circuit before.

3.png

I just tapped the outputs of the synchronous counter to the inputs of the decoder instead. This way, I got outputs of 00, 02, 04, 06...98 all taken care of.
 

WBahn

Joined Mar 31, 2012
29,978
Now you've got six digits! Which two are the ones that are supposedly counting by twos?

What are the constraints on this project? What devices are you permitted to use?
 
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