CS Amplifier Design

Discussion in 'Homework Help' started by ElectronicReaper, Oct 19, 2012.

  1. ElectronicReaper

    Thread Starter New Member

    Oct 14, 2012
    Hello all, I have the following homework problem that I have no clue how to begin.


    All the capacitor is a bypass capacitor I assuming so that the DC component of the AC signal of Vin is blocked

    I have made listed of the given quantities as follows:
    <br />
\mu_n C_{ox}= 100 \frac{\mu A}{V^{2}} <br />
V_{th} = 0.4V \text{(threshold voltage)}<br />
A_v= 6 \text{(voltage gain)}<br />
P=6 mW \text{(power budget)}<br />
R_D=200 \Omega<br />
V_{DD} = 1.8 V

    This leads to quite a few unknowns such as:
    <br />
\frac{W}{L} \text{Aspect ratio}<br />
I_D \text{drain current}<br />
V_{GS} \text{Gate to source voltage}<br />
V_{DS} \text{Drain to source voltage}<br />
R_1, R_2, R_s<br />

    I know can constructing the following equations
    <br />
A_v=-g_m (R_D || R_s)<br />
<br />
V_{DD} - I_D R_D - V_{DS} - V_{RS} = 0<br />
V_{DD} - I_D R_D - V_{DS} - V_{OV} = 0<br />
V_{DD} - I_D R_D - V_{DS} - (V_{GS}-V_{th}) = 0<br />
<br />
I_D = \frac{1}{2} \mu_n C_{ox} \frac{W}{L}{V_{OV}]^2 <br />
<br />

    from there I tried but it's like too many unknowns to even attempt a correct solution
  2. blah2222

    Well-Known Member

    May 3, 2010
    You are given quite a lot of information there to start off with. It might be a good place to start off with your gain equation. The one that you posted is not correct, try solving the small-signal model again to reach this result (they exclude output resistance). Can you make any assumptions on that equation and use them to your advantage?

    The power dissipated should only really be due to the drain current, limiting as much current as you can through R1 and R2, as they are only used to bias the gate.

    The overdrive voltage (Vgs - Vt) is given as the voltage drop across Rs, which is just Vs. Once you figure out what Rs and Id are, you will be able to find out what Vg has to be. R1 and R2 is just going to be a voltage divider of Vdd to set Vg (keep power dissipation in mind).

    Make sure to check that the bias conditions of Vds and Vgs satisfy that it is operating in it's saturation mode for amplification.

    You have all the tools. Good luck!