Crude ADC with RC charge time measurement

Discussion in 'General Electronics Chat' started by greek, Sep 26, 2012.

  1. greek

    Thread Starter New Member

    Sep 22, 2012
    8
    0
    I have set up an RC circuit and some logic to discharge/charge and measure the time it takes for the cap to pull a TTL input pin high.

    The R in RC is a linear pot used as a variable resistor. From the little I can remember from school, the time I measure should be proportional to R (since everything else in the circuit remains unchanged).

    However what actually happens is that with bigger R the difference in time gets smaller.

    I'd like to understand first if I am correct in thinking that t \propto R, and if so, why that does not happen on my desk.

    Here is my setup:

    [​IMG]
     
  2. crutschow

    Expert

    Mar 14, 2008
    13,050
    3,244
    What is the LOGIC_IN signal?

    How do you measure R, between what two points?
     
  3. MrChips

    Moderator

    Oct 2, 2009
    12,449
    3,365
    100μF is a bit large. You don't want to use an electrolytic.
    You do not need any extra components besides R and C. You can connect this to a single I/O port of an MCU. I have done this many times using a 100nF capacitor.
     
  4. greek

    Thread Starter New Member

    Sep 22, 2012
    8
    0
    logic_in is connected to a PC parallel port, as is discharge.

    The software sets discharge high for a while, then sets it low and then continually polls logic_in until it reads high. (keeping track of time elapsed).

    R2 has one end floating, one end to R1 and the middle connected to the cap.
     
  5. WTP Pepper

    New Member

    Aug 1, 2012
    21
    6
    I used this technique years ago for a crude ADC.
    You need a stable capacitor. 1% Silvered Mica.
    Although the spec on a CMOS input is 30-70% for a trigger, they are 50%. I haven't come across any HC gates that aren't.
    Use a look up table.
    Use a FET to discharge C, then open the FET to allow charging from a stable supply.
    Remember
    V(t)=Vcc(1-e^t/RC)
    V(t)=Vcc/2 - CMOS trip point


    Take Logs of both sides to get an expression that involves t in terms of Vcc, R & C. The rest is schoolboy maffs.
     
  6. greek

    Thread Starter New Member

    Sep 22, 2012
    8
    0
    I will try that, but I am still curious as to why my thing behaves nonlinearly. Why should I avoid elecrolytics?
     
  7. MrChips

    Moderator

    Oct 2, 2009
    12,449
    3,365
    I can't answer your non-linearity without seeing the whole set up.

    Electrolytics have a residual polarization effect and hence the capacitance is not well defined. You want to use a non-electrolytic capacitor. Hence keep the capacitance below 1μF for repeatable results.
     
Loading...