Counting number of logic 1s in a 8-bit binary vector

Discussion in 'Homework Help' started by Zulfi, Oct 17, 2009.

  1. Zulfi

    Thread Starter New Member

    Oct 17, 2009
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    0
    Hi,
    Right now I am in a middle of an important digital assignment. I require some help with designing a digital logic circuit. I am kind of stuck.

    Part of my circuit digital design requires me to design a circuit to calculate the weight of any random byte. In other words, I have to count the number of logic 1s present in a 8-bit binary vector either using adders or counters but I cannot get my head around how to do this properly. One of the conditions is that all 8 bits cannot be zeros or ones.

    3 bits would be required to hold the maximum count that is 7 e.g. ABC. I approached by trying a combination of full and half but the circuit is a bit messy and complicated and not working 100%. I wonder if there is a solution using counters. I am allowed to use any ECAD tool.

    Any suggestions and ideas will be appreciated. Please illustrate if any particular counter is recommended. There are eight inputs to the counter and three outputs from the counter.

    I hope I was able to explain my problem. :confused:
     
  2. LKjell

    New Member

    Oct 17, 2009
    6
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    I made something just for 3 bits though. When you get 7 and 0 the output is 0. See if it like this you mean.
     
    Last edited: Oct 17, 2009
  3. t_n_k

    AAC Fanatic!

    Mar 6, 2009
    5,448
    782
    Are you required to use only adders and/or counters exclusively or can you use other logic - such as an 8-to-1 bit multiplexer?
     
  4. Zulfi

    Thread Starter New Member

    Oct 17, 2009
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    0
    I can use multiplexors if required but I have never used them before and am not very familiar with them.

    Please feel free to ask if you are unclear of anything. I am also working on the assignment.
     
  5. LKjell

    New Member

    Oct 17, 2009
    6
    0
    Well there are many ways to do this. If you want to have minimum of gates then you can try mux method. Otherwise a suggestion is to add two input together. Say you have abcd as input then.

    A_1 = a\oplus b, A_2 = ab
    B_1 = c\oplus d, B_2 = cd

    Now you add those together using full adder. You should then get 3 output, where 100_2 is the maximum number you get.

    Then you repeat with efgh and get 3 output. So you add those 3 output with the previous ones. If both most significant bits are 1 then you can conclude that your input is 1s only and need to report and error. And if you want to check that all of them is zero only then use NOR or OR gates. I prefer NOR since then I can something light up.
     
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