# Counters

Discussion in 'Electronics Resources' started by El3, Sep 13, 2014.

1. ### El3 Thread Starter Member

Sep 13, 2014
37
0
We're going to do a laboration in digital electronics. Unfortunately they haven't at all explained to us a big part of the theory which is about counters that is needed in order to understand the laboration.

The counters we are going to use is either one of the following: "74LS191" and "CDUD4". We have uploaded the datasheets for these here, see the attachments. These datasheets are a bit hard to interpret. So the first question is: except for reset and load, what is the difference between these two counters?

Then, looking at the datasheet for 74191, we are apparently supposed to use CTEN, U/D, LOAD, A, B, C, D and CLOCK as inputs and QA and QD as outputs. Do these names have signify anything? U/D apparantly stands for up/down which signifies a counter going up or down and CLOCK is self-explanatory, but what does CTEN and LOAD mean? And why is there an overline over these words?

We are also given a table that is supposed to specify how the 74191 works and schematic of how the circuit should be connected, but these are not really explained so they are not so easy to understand. See attached images.

Here's also the description for how the main circuit (not including the counter) should work.
The above description is easy to understand though, the complicated part is the counter.

Anyway, from this information, we are supposed to draw a graph for the counter that shows it's states and inputs. How can we do that? Is this even possible from the information given?

Then we are supposed to draw another graph that shows when a lion goes in or out of the cage. Here the outputs should go directly to the counter.

Lastly we should make a function table that shows how the output signals (the signals to the counter and the next state-function) are dependant on the input signals (the detectors and the state variables). We should also write Boolean expressions for the output signal functions and next state-function and draw the sequencial circuit.

All this may sound more complicated than it is, but actually the only thing that makes it difficult is the counter. Might there be someone here who is good at digital electronics, in particular counters, that can help us? Please write even if you can only answer one question, all helpful inputs can be useful in order to get the big picture!

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2. ### lightingman Senior Member

Apr 19, 2007
374
22
QA, QB, QC, QD are outputs. If you consider one binary counter you could interpret them a 1, 2, 4 and 8 respectively. By adding all these numbers together, you will get 15 that is how binary works......

If all the outputs are at logic level 0 then your count would be zero. If your outputs were all at logic 1 then your count would be 15. So for instance, if QA (1) and QB (2) and QC (4) were at logic 1 and QD (8) was at logic 0, your count wold be 7 (1+2+4=7).

The clock input will move the count up or down by one count at each transition IE. low to high or high to low depending on the device or the up and down inputs state.

A, B, C and D will be inputs to pre-set the counter to a number to count up or down from.

Reset speaks for itself (sets the counter to Zero).

The truth table is the key to understanding how a device functions.

Hope this helps.

Daniel.

3. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,595
393
hi,
CTEN = CounT ENable [ note the Bar over the top means it has to be Low to enable counting.

LOAD = pre- Load the counter with what ever data there is on the A,B,C,D inputs

QA,QB,QC,QD are the data output pins.

NOTE: its a Binary counter 0 thru 15.

4. ### El3 Thread Starter Member

Sep 13, 2014
37
0
Thank you for those clarifications. They help in understanding how the counter works, to some extent. Could someone please also help with the other questions? Here they are again for simplicity:

a) Draw a graph for the counter that shows it's states and inputs.
Doesn't seem too complicated. The counter has 3 states and the only input signals are CTEN and U/D, right?

There is a control network needed that can be seen as the interface between the detectors (G1, G2) and the counter, see th attached description (desc.jpg). It is this control network that should be constructed. It should detect a difference of the sequences

(G1,G2)out = 00 -> 10 -> 11 -> 01 -> 00

and

(G1,G2)in = 00 -> 01 -> 11 -> 10 -> 00

If (G1,G2)out occurs the counter should count up one and if (G1,G2)in appears it should count down one. Corresponding output sequences are

(CTEN,U/D)out = ... 10 -> 00 -> 10 ...

and

(CTEN,U/D)in = ... 10 -> 01 -> 10 ...

As earlier the detector values (G1,G2)out and (G1,G2)in marks repetition of the values in the realization. However the output signals can only give one calculation condition to the counter.

b) Draw a graph that shows when a lion goes in or out of the cage. Use as earlier the detector signals G1 and G2 as input signals. The output signals of the graph should go directly to the counter, so use CTEN and U/D as they are described above. It is possible to solve this with two states.
This question is a bit hard to understand. Which states, input and output signals do we have here?

c) Create a function table that shows how the output signals (the signals to the counter and the next state-function) are dependant on the input signals (the detectors and the state variables). Write Boolean expressions for the output signal functions and next state-function and draw the sequencial circuit.

Last edited: Sep 14, 2014
5. ### ericgibbs AAC Fanatic!

Jan 29, 2010
2,595
393
hi,
(a) Look at Page# 6 of your datasheet for the counter state diagram.

(b) As a lion goes out the counter decrements, as one enters the counter increments

(c) show us what you make the answer.?