# Counter using Dflipflops

Discussion in 'Homework Help' started by lupinkr, Nov 20, 2011.

1. ### lupinkr Thread Starter New Member

May 17, 2011
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0
Hello AAC community !

I need your help about a homework question (Sophomore Logic Design EE):

"Design a counter that repeats the sequence of 000, 010, 011, 111, 101, 100 using D flip-flops and logic gates. Assume that the D flip-flops have both Q and Q' outputs."

Of course I read the class material thoroughly and consulted as well various sources, be it textbooks or on the internet (AAC included ) but it seems that I haven't properly figured out what is needed to implement the circuit.

Let me share with you my reasoning so far : the question asks to design a counter that repeats a sequence.

The problem is that the sequence is not in BCD order, so that excludes the usage of a Johnson counter with unused states.

I thought about an up and down counter, since from state 1 to state 3, its counting upwards and from state 4 to 6, its counting downwards but making such a counter will not yield the expected result, as it will just count from 1 to 3 then from 3 to 1, and it needs a control, not asked for in the question...

Maybe combining it with something .. ?

In most guides or textbooks it is explained how to implement a counter for BCD sequence, modulo n, etc..

So the question might be : is there a type of counter that actually can process a clocked random binary sequence of our choice ? (using D FFs)

Thank you very much. This question confused me a lot.

EDIT : I noticed that the sequence is some kind of graycode. Still have no clue how to implement it

Last edited: Nov 20, 2011
2. ### justtrying Active Member

Mar 9, 2011
329
408
short answer - there is. You have to use additional logic to force the states go into the sequence that you want.

check this out - http://www.allaboutcircuits.com/vol_4/chpt_11/5.html - there is an example for D FFs towards the bottom. The trick is to come-up with the state table

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3. ### Georacer Moderator

Nov 25, 2009
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Since you have already made your state sequence, you should start with step 3 of the tutorial. Don't make a Y (output) column, just read the state of all the FFs. You also don't have an input column, so you need only one arrow coming out of each state.

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4. ### lupinkr Thread Starter New Member

May 17, 2011
9
0
Thanks to both of you, it was of great help ! Now I know I need to find the appropriate logic for the inputs and make the state diagram etc..

I did all the steps properly, now my question is, what to do to make invalid states eventually transition to a valid state ? I tried to plug the values of the bits of the invalid state in the flipflops logical functions and get a valid state, is that correct ?

Again, thank you !

5. ### Georacer Moderator

Nov 25, 2009
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You should never end up in an invalid state, if all things go as planned, and therefore you don't care what happens after an invalid state. That means that you can enter whatever you want in their "next state" columns (X) to help you build an easier logic circuit.

For added robustness, you can drive all of the invalid states to the first state (000).

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6. ### MrChips Moderator

Oct 2, 2009
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7. ### lupinkr Thread Starter New Member

May 17, 2011
9
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Indeed the circuit wouldn't enter an invalid state unless it is forced by some external element.

And yes, it answers my question but then how to force the invalid states to 000 ? in this precise case, when I don't care about them, the logic inputs functions are as follows :

Q1+ = Q3
Q2+ = Q'1
Q3+ = Q2

Does it mean I have to remake a state table including them, and try to find the corresponding logic functions ? Or is there an easier way to force those to 000...?

Thanks.

8. ### lupinkr Thread Starter New Member

May 17, 2011
9
0
It is similar but I couldn't find the answers I hoped for. Thank you anyway !

9. ### Georacer Moderator

Nov 25, 2009
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I think it is time you posted your transition table for us to understand each other.

10. ### MrChips Moderator

Oct 2, 2009
12,656
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Of course you will not find the answers you are looking for. What is shown in that thread is how to work through the example and come up with your own answer. This site does not provide students with the answer on a silver platter.

11. ### thatoneguy AAC Fanatic!

Feb 19, 2009
6,357
718
If it is a counter that cycles through those states, the only way an invalid state would be present is at power on. Adding a power on reset to set the counter to all zeros would remove that condition.

Provided there isn't another location in the layout where a miscreant professor can't inject a value.

Or was part of the assignment "With circuitry to reject invalid states"?

12. ### Georacer Moderator

Nov 25, 2009
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The count starts at 000, so even in power on, D-FFs, will start at 0 state. I think this is guaranteed.

13. ### lupinkr Thread Starter New Member

May 17, 2011
9
0
Sorry !

Code ( (Unknown Language)):
1. Current State   Next State (=Flip Flop Input)
2. Q1  Q2  Q3  Q1+ Q2+ Q3+
3. 0   0   0   0   1   0
4. 0   1   0   0   1   1
5. 0   1   1   1   1   1
6. 1   1   1   1   0   1
7. 1   0   1   1   0   0
8. 1   0   0   0   0   0
9. 1   1   0   X   X   X
10. 0   0   1   X   X   X

From the transition table we can see that

Q1+ = Q3
Q2+ = Q'1
Q3+ = Q2

are the logic functions for DFF inputs. The two invalid states are 001 and 110. If actually the machine enters, say, 001 state, then by the logic functions the next state it will try to transition to is 110, and vice versa.

You are right, but :
So there are cases where the machine would enter an invalid state. We can of course always reset manually the DFFs using the reset button to 000.

But what if we had no reset function of the D flipflop, and just want a way to force the unusual states to 000 or any other valid state ?

Yes exactly. In this page the author explains how he used two NOR gates to force the 010 state into 000. I tried my best to understand, but I am still confused on how and where to implement such a thing in my design. If I understood well, I have to make some logic circuitry that forces 001 into 000. Which means in Kmap :
Code ( (Unknown Language)):
1.
2.    BC   00  01  11  10
3. A
4. 1   1   1   1   1
5. 0   1   0   1   1
This yields : F = B'C' + A + B.

Provided my reasoning is correct, where do I have to implement this ?

I don't think I was asking for answers on a silver plate - I was asking for explanations. I always showed my work and my reasonings as attempts to solve the problem. Thanks anyway.

Last edited: Nov 21, 2011
14. ### Georacer Moderator

Nov 25, 2009
5,151
1,266
In your transition table the rows should be written in ascending order, from 0 to 7. This will help you avoid a lot of confusion. Don't sort them in the progression of your count sequence. Make it like the table in step 4 here:

If you want to force the invalid states to 000, just replace the X terms with 0. BUT this will make your FF input functions much more complicated.

A way to work around this is to take advantage of the fact that FF ICs have a reset pin. SEPARATELY of the circuit you built before, make another logic function circuit that will read the FF state and will output a 1 when you get 110 or 001, in other words, build the function Σ(1,6). This function will trigger the reset pin of all the FFs.
BE CAREFUL, as most FF ICs actually reset at LOW pin level, in which case you must invert the function output.

15. ### justtrying Active Member

Mar 9, 2011
329
408
as Geogracer pointed out reset button comes in handy when you need to reset your counter or when you want to force it to start at a specific state.

16. ### lupinkr Thread Starter New Member

May 17, 2011
9
0
Hi everyone,

Sorry for the late follow-up. I successfully got my circuit to work and could -at last !- understand D Flip Flop counters. In absence of a reset button, as Georacer said :
I just needed to find new logic functions (through new Kmaps and by replacing the X by 0) that would make the next state of invalid states 000 (or anything actually - the choice is yours !)

Thank you everybody ! I hope this helps people with similar problem/assignment. Cheers !