Hello fellow members.
I'm new to the AAC community and, as a budding electronics hobbyist, I could surely benefit from
those of you who have greater expertise. If anyone can provide some assistance regarding my dilemma
noted below, I'd be greatly appreciative.
Project: Presettable Countdown Timer that stops at zero and sets off a buzzer.
Note(s):
1. Attached circuit is a working draft created in Circuit Wizard simulator.
2. Circuit will later be expanded from 2 digits to 6 digits.
3. BCD Thumbwheel input to presettable 4510 counter temporarily omitted from design.
4. LED temporarily substituted for alarm buzzer.
Technical Overview:
Astable NE555 Timer set for 1 sec clock pulse (1Hz).
Presettable BCD input of 4510 is temporarily set to 20 sec - (L2) set High on Display 1 (DS1)
SPST Momentary (SW1) Loads presettable BCD and triggers astable countdown.
SPST Momentary (SW2) used for reset.
Buzzer 1 tied to both switches (SW1, SW2) for audio feedback when pressed.
OR Gate 4071 is tied to Carry Out of both 4510 counters and stops clock at zero.
Monostable NE55 Timer for Alarm portion of circuit set for 4.7 sec duration.
Notes(s):
1. SPST latching switch for clock trigger avoided intentionally for design / functional purposes.
2. NPN Transistor (Q3) intentionally left floating pending triggering mechanism.
Problem / Dilemma:
I'm unable to figure out how to trigger the monostable alarm feature via NPN Transistor (Q3) when
the countdown timer stops at zero. I struggled with the Schmitt Trigger, 4093 NAND, and other logic
gates without success.
Note: Both the astable timer circuit and the monostable alarm portion of the circuit function
properly independently.
Please assist with any advice or direction regarding a solution.
Thank you kindly!
I'm new to the AAC community and, as a budding electronics hobbyist, I could surely benefit from
those of you who have greater expertise. If anyone can provide some assistance regarding my dilemma
noted below, I'd be greatly appreciative.
Project: Presettable Countdown Timer that stops at zero and sets off a buzzer.
Note(s):
1. Attached circuit is a working draft created in Circuit Wizard simulator.
2. Circuit will later be expanded from 2 digits to 6 digits.
3. BCD Thumbwheel input to presettable 4510 counter temporarily omitted from design.
4. LED temporarily substituted for alarm buzzer.
Technical Overview:
Astable NE555 Timer set for 1 sec clock pulse (1Hz).
Presettable BCD input of 4510 is temporarily set to 20 sec - (L2) set High on Display 1 (DS1)
SPST Momentary (SW1) Loads presettable BCD and triggers astable countdown.
SPST Momentary (SW2) used for reset.
Buzzer 1 tied to both switches (SW1, SW2) for audio feedback when pressed.
OR Gate 4071 is tied to Carry Out of both 4510 counters and stops clock at zero.
Monostable NE55 Timer for Alarm portion of circuit set for 4.7 sec duration.
Notes(s):
1. SPST latching switch for clock trigger avoided intentionally for design / functional purposes.
2. NPN Transistor (Q3) intentionally left floating pending triggering mechanism.
Problem / Dilemma:
I'm unable to figure out how to trigger the monostable alarm feature via NPN Transistor (Q3) when
the countdown timer stops at zero. I struggled with the Schmitt Trigger, 4093 NAND, and other logic
gates without success.
Note: Both the astable timer circuit and the monostable alarm portion of the circuit function
properly independently.
Please assist with any advice or direction regarding a solution.
Thank you kindly!
Attachments
-
226.3 KB Views: 132