Hi Guys
I’m making an eight bit wide core rope memory.
Roughly following Kos’ previous example doesn’t take one as far as reading the memory
into digital inputs, so from here I'll have to wing it, and experiment with external circuitry.
For this reason, I’ve made a single ferrite version of the circuit for proving examples with first.
I’ve also recorded this single ferrite circuit:


http://img.photobucket.com/albums/v186/ArtArt/Test_Circuit_Schema_zpsqs4mhycd.png

From here I will be wanting to increment each wire with a decade counter or shift register,
to detect pulses at the transformer secondaries with an eight bit parallel port.
So other than testing the memory weaving, I’ll not actually be needing the 555 oscillator.

555 oscillator PCB:

http://img.photobucket.com/albums/v186/ArtArt/555_oscillator_zpsgyhpr3qj.png

Ferrite PCB:

http://img.photobucket.com/albums/v186/ArtArt/One_Bit_LED_zpscfgfyabt.png

I have so far reproduced Kos’ experiment... (virtually).. I didn’t bother to wire seven set LED patterns.
http://qrp.gr/coreROM/

Here is a video including the eight bit board with two full bytes test ROM:

Questions
1) Are there any considerations to make for the input to a micro or parallel to serial shift register
from the transformer secondaries? Diode clamping is one I can think of perhaps.
2) Do I need a current limiting resistor on each of the supply pins from a logic chip to a primary wire?
I notice in the circuit above, that if I disconnect the DC driven output LED (on the 555 circuit),
the 555 output has more current to drive the AC coupled LEDs brighter.
This is more noticeable on the eight bit board where 8 LEDs can be driven together,
and they are not high intensity LEDs.
3) Do you have any other suggestions? My next step is to automate the input signals,
and try reading the output pulses digitally with a micro, either directly, or indirectly.
Cheers, Art.

 

I assume that you have seen these:
http://hackaday.com/2013/10/09/making-a-core-rope-read-only-memory/
http://qrp.gr/coreROM/

I have a book titled something like Computers in Space that talks about the rope memory in the Apollo spacecraft. Changing the contents of the ROM was not easy. :-(

 

The normal pictures, please don't use *.png, the file size will be too large for many times, you can using *.jpg, the schematic can be use *.gif, *.png used for simple line.

 

Ok, noted!

It looks like the 200mA from the 555 output pin is enough tot light the LEDs,
but dealing with logic such as a decade counter with 20mA is not enough current.
Just for experimentation, I transistor buffered the decade outputs, and 100mA is not enough either.

In practice it would seem easiest to use the lowest current I can get away with for the inputs
since there will be many of them, and amplify the outputs since there are only eight of them.
Cheers, Art.

 

I dont see a reaad pulse, the read pulse should be a negative pulse strong enough to flip the magnetic field of the core to the oposite polarity. also, the core material should be easily saturable.

 

Core ROM is not the same as core RAM. That was my last project
The ferrite operates well within it’s saturation region, and does not have hysteresis property at all.
In the video with the 555, the pattern you see are the read pulses (lots of them at frequency).

This one is a fully working 4 bit test version:

I dont see a reaad pulse, the read pulse should be a negative pulse strong enough to flip the magnetic field of the core to the oposite polarity. also, the core material should be easily saturable.

 

core operates by putting a read pulse to flip any set cores magnetic field, giving a pulse output to show that it was set. any unset cores will not pulse when read. the read function erases the data in the core and has to have the core refreshed to reset the data. there is only one ulse going in , and no data our or refresh circuit.

 

You are accurately describing core RAM. This is core ROM.
Both contain the word “core”, that is the end of their similarity.

core operates by putting a read pulse to flip any set cores magnetic field, giving a pulse output to show that it was set. any unset cores will not pulse when read. the read function erases the data in the core and has to have the core refreshed to reset the data. there is only one ulse going in , and no data our or refresh circuit.

 

then where do you insert the data to begin with? all core memory has some charistics of rom, power down and the data remains. some of the wiki is wrong, how do you get 64 bits in one core? thats what they claim.

 

Yes, you could read 64 bits from a single core.
I just posted (above) a video of a four bit core ROM on a board that contains only one ferrite core.
The data in a core ROM is physically woven, and will never be altered electronically.
The data in a core RAM is both addressed, set, and cleared electronically.

Yes it will survive as a non-volatile EEPROM, but will the data survive a permanent magnet?

 

I heard the same thing! I wonder if they used iPhone simulators to encode their weaving

I assume that you have seen these:
http://hackaday.com/2013/10/09/making-a-core-rope-read-only-memory/
http://qrp.gr/coreROM/

I have a book titled something like Computers in Space that talks about the rope memory in the Apollo spacecraft. Changing the contents of the ROM was not easy. :-(