Converting boolean to all Nand gates

Discussion in 'Homework Help' started by Unkn0wn, Nov 29, 2014.

  1. Unkn0wn

    Thread Starter New Member

    Nov 29, 2014
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    Hey, having trouble converting an expression to all nand gates...

    The equation that I currently have is..
    ¬A.(¬B.¬C) + A.((¬B.¬C)¬) <--- Tried to show b and c having a line over them

    not sure on how to go further on converting to all nand gates.

    Any help is appreciated,

    Cheers :)
     
  2. shteii01

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    Feb 19, 2010
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  3. Unkn0wn

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    Nov 29, 2014
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    I do have the logic gate diagram that works, but how do I get the equation from it? Can it be simplified further or is that as far as it goes?

    what I mean to say is, I have swapped the gates to the nand version, is that as simplified as it goes?
     
  4. MikeML

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    Here is how I do it:

    First convert to sum of products. Then draw it using only ANDs, ORs and INV. Finally, using the duality of NANDs being OR for active-low inputs, draw the final circuit (which is all NAND gates).
    nands.gif
     
  5. Unkn0wn

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    Nov 29, 2014
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    That does help a great deal, thanks a lot! What would be the equation for the nand be?

    Thinking it would be... (¬(¬A¬B¬C) . (¬AB) . (¬AC))

    Not entirely sure how to show the simplification from the sum of products to the nand?

    Cheers
     
  6. shteii01

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    To simplify you have a choice of two methods:
    1) Apply rules of Boolean math.
    2) Do the K-map.
    Or do both. Do the Boolean math and get the equation as simple as you can. Then take your simplified Boolean equation and make K-map of it, and see if you can simplify it even further.
     
  7. WBahn

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    Mar 31, 2012
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    First, the NOT operator using this notation always goes immediately before the factor being inverted, so you should have written this as:

    ¬A.(¬B.¬C) + A.(¬(¬B.¬C))

    Second, you will find that on this forum -- and most EE-oriented forums -- that the mathematical notation and terminology, such as conjunction and disjunction, is not used and that, instead, the overbar or apostrophe and the AND, OR nomenclature dominates. Using that, you would have:

    A'(B'C') + A((B'C')')

    The key to the reductions is DeMorgan's Theorems, namely:

    (AB)' = A' + B'

    Since the left-hand side IS a two-input NAND gate, if you can manipulate your expressions into the form on the right, then you know how to convert that to a two-input NAND gate. If you aren't restricted to two-input gates, then you can use the generalized form which would be:

    (ABC...)' = A' + B' + C' + ...
     
  8. WBahn

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    Or do both but in the opposite order. Draw the K-map to see how things simplify and use that to help figure out how to see the simplifications in your Boolean algebraic manipulations.
     
    Last edited: Nov 29, 2014
  9. WBahn

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    Note that the original expression

    A'(B'C') + A((B'C')')

    Is almost in the form you need it in order to convert it to just NAND gates (keeping in mind that inversion is trivial to accomplish with a NAND gate, if needed).
     
  10. Unkn0wn

    Thread Starter New Member

    Nov 29, 2014
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    Thanks for the help,

    so, would you take it down this route..

    A'B'C' + AB + AC

    Then go on to DeMorgan it further? Not sure of the K-maps haven't encountered those yet.
     
  11. WBahn

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    Then don't worry about the K-maps. You'll get to them soon enough.

    Starting out that way is perfectly fine and reasonable. What caught my eye is that (B'C')' is already a NAND gate, so you might choose to leave it intact. Dealer's choice, but expanding it first (as you've done above) makes things cleaner in the end.

    So what's the next step? What do you get after applying DeMorgan's to the above?
     
  12. Unkn0wn

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    Nov 29, 2014
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    Just had a go through it, the outcome I have is..

    (((A'B'C')') . (A'B'.A'C')')

    Not to sure about this?
     
  13. WBahn

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    Show things step by step.

    What is

    A'B'C' + AB + AC

    After applying DeMorgan's. Just use the basic relationship that

    X+Y+Z = (X' Y' Z')'
     
  14. Unkn0wn

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    Nov 29, 2014
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    (A'B'C') + (((AB)') . ((A'C)')')

    (((A'B'C')') . (((AB').((AC)')'')') -- Doubles cancel out

    (((A'B'C')') . ((AB)').((AC)')')

    Am i going in the right direction?
     
  15. WBahn

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    First off, you're making it harder than it is. Remember that DeMorgan's Theorems can be generalized to any number of terms, so if you have three terms, X, Y, Z, than you have

    X+Y+Z = (X'.Y'.Z.)'

    You can do it two terms at a time if you want:

    X+Y+Z
    = X + (Y+Z)
    = X + (Y'.Z')'
    = (X'.[(Y'.Z')']')'
    = [X'.(Y'.Z')]'
    = (X'.Y'.Z')'

    But, once you've shown this general pattern, you can just use it directly.

    But let's work through the way you did it (which is fine). I would recommend using square and curly braces, as well as spacing, to make your groupings easier to see instead of just a bunch of parens all crammed together. Also, while unneeded parens can make things easier to see, they can also make things harder to see, but that's quite subjective.

    So I would make the following changes to your first line (without saying whether that line is correct or not as you've done it):

    (A'B'C') + (((AB)') . ((A'C)')') => (A'B'C') + ( [(AB)'] . [(A'C)']' )

    And, by just using square brackets for two of the groupings, you can see that you've got an error and that what you meant was (hopefully):

    (A'B'C') + (((AB)') . ((A'C)'))' => (A'B'C') + ( [(AB)'] . [(A'C)'] )'

    But the square brackets, especially when written as parens, don't add anything but confusion, so instead:

    (A'B'C') + [(AB)' . (A'C)']'

    Do you see how much cleaner that is? The parens around the first term aren't necessary, but I think they add clarity.

    Now when you apply DeMorgans to this, you can keep things a bit clearer:

    { (A'B'C')' . ([(AB)' . (A'C)']')' }'

    And see the double negation:

    { (A'B'C')' . [(AB)' . (A'C)'] }'

    And since AND is associative, you can no remove the square brackets (and use them in place of the curly braces):

    [ (A'B'C')' . (AB)' . (A'C)' ]'

    Now, I have maintained an error that you made in the first line (in addition to the one I corrected based on guessing what you meant) and just carried it through. Notice that in the expression we started from we had AB + AC as part of it. In your first manipulation of this, you ended up with and (AB) term and with an (A'C) term. Does that make sense? Take a look at your work and I think you will spot the error pretty quickly.
     
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  16. Unkn0wn

    Thread Starter New Member

    Nov 29, 2014
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    So, I see that I've added an extra not into the expression,

    Removing that, this is what I'm left with...

    [ (A'B'C')' . (AB)' . (AC)' ]'

    What do you think?
     
  17. WBahn

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    Mar 31, 2012
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    I think you have a circuit consisting of nothing but NAND and NOT gates. Good job.

    As I think you probably know, you can make a NOT gate out of a NAND gate either by tying one input HI (the best way) or tying both inputs together (an acceptable way). From a Boolean algebra standpoint, tying them together is perhaps the simplest way to represent it, so

    A' = (AA)' = (A.A)'

    Otherwise you have to use an explicit True, 1, or HI signal, so

    A' = (1.A)' = (T.A)' = (H.A)'
     
  18. MikeML

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    Now go look at the bottom of the diagram I posted back in post #4.

    Note that once I had written the expression as a sum of products, I went from that directly to the final diagram... with no Boolean Algebra.
     
  19. Unkn0wn

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    Nov 29, 2014
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    OK, so the logic circuit were using is the one posted above which is using one input. (I believe)

    The circuit works perfectly for my use, it gives out the correct readings.

    But, how do I show that I remove the not gates? Is there a Law that I have to follow?

    Thanks for the digram Mike!
     
  20. MikeML

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    If the rules of the game call for implementing the function using only NAND gates, the answer is "you dont", because a NOT gate is a one-input NAND gate, or if you must use two-input NANDs, then simply feed the same signal to both inputs.

    Did you understand that I drew the final NAND gate solution by first drawing it using AND,OR, and INV gates, and I did the final conversion to using only NANDs by inspection.

    I could just as easily have drawn the final diagram using only NOR gates. You want to see how?
     
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