Converting an expression to only use NAND gates

Discussion in 'Homework Help' started by Ben Scanlon, Nov 28, 2015.

  1. Ben Scanlon

    Thread Starter New Member

    Nov 28, 2015
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    Really stuck. I've tried de Morgan's law but I'm confused as to when converting the whole expression, the 'and' gates will change to 'or' gates and when where to change it to a 'not' expression. Also a bit unsure as what to do with the XOR gates. Would I just use distributivity?

    I need them all to be NAND gates.

    Sorry if my English is bad and ignore the crossing out after the B

    Screen Shot 2015-11-28 at 18.15.23.png
     
  2. shteii01

    AAC Fanatic!

    Feb 19, 2010
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    XOR gate using NAND
    [​IMG]

    OR gate using NAND
    [​IMG]

    AND gate using NAND
    [​IMG]

    NOT gate using NAND
    [​IMG]


    All these came from wiki.
     
    Last edited: Nov 28, 2015
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  3. Ben Scanlon

    Thread Starter New Member

    Nov 28, 2015
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    Thanks for the reply!

    I get how to convert it into a circuit. It's writing it out as an expression that is confusing me.
     
  4. WBahn

    Moderator

    Mar 31, 2012
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    The best approach is to expand the XOR into what it really is, namely A'B + AB'
     
  5. shteii01

    AAC Fanatic!

    Feb 19, 2010
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    I fixed the AND gate and added NOT gate.
     
  6. RBR1317

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    Nov 13, 2010
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    Have you tried to layout that function on a Karnaugh Map? Minimizing for a hardware design using Boolean algebra is really difficult. I guess that is why K-maps were invented. Also, this seems like a natural for using some 3-input NAND gates.
     
  7. WBahn

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    Mar 31, 2012
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    The key to DeMorgan's Theorem is that you can change any AND or and OR, or vice-versa, and maintain the same functionality by inverting the signals at ALL inputs and ALL outputs of THAT gate.

    Do things one layer at a time.

    For instance, if you have

    Y = A(B' + C)D' + AB'(C+D)

    First get the final NAND gate functionality in there by applying DeMorgan's to the whole thing:

    Y = {[A(B' + C)D'][AB'(C+D)]}'

    Now worry about the internal signals at the next layer. And so on and so on.
     
  8. RBR1317

    Active Member

    Nov 13, 2010
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    There is an alternative method that does not rely on DeMorgan expansions. It is a just simple method of expansion that yields the same minterms that would appear in a Karnaugh map. Minterms can be recombined into a simpler form that mimics K-map minimization. Of course, it helps if you have the K-map so it is easy to see which terms need to be combined. This function can be implemented with just four 3-input NAND gates and three inverters to negate three of the input variables.
    Expression in NAND circuit.png
     
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  9. dl324

    Distinguished Member

    Mar 30, 2015
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    @RBR1317 In the Homework Help forum, the preferred mode of operation is to guide students to the answer. Giving them the answer deprives them of an opportunity to prove to themselves they can do it. Most teachers would consider having someone do your homework for you cheating.
     
  10. shteii01

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    I am not defending BRB, but... sometimes... it is just too painful to watch.
     
  11. RBR1317

    Active Member

    Nov 13, 2010
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    Exactly what I did. Explained a general method to approach the problem, pointed the direction, and walked about 15% down the path. It's up to the OP to do the other 85% to the final solution.
     
  12. dl324

    Distinguished Member

    Mar 30, 2015
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    If you say so. IMO, you did most of the work.
     
  13. dl324

    Distinguished Member

    Mar 30, 2015
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    That's why I only visit the Homework Help forum when I'm really bored.

    I also stay away from the ones where the OP can't communicate well.
     
  14. Ben Scanlon

    Thread Starter New Member

    Nov 28, 2015
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    All RBR has done is expand the expression and explained HOW to do it.

    Thanks for your help though, Dennis.
     
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