Construction of a logic gate

Discussion in 'Homework Help' started by mr_l, Sep 16, 2011.

  1. mr_l

    Thread Starter New Member

    Aug 20, 2011
    Hello I am new to this forum although I have used this site for some time.
    I got stuck with the following task and need some help.
    I have to draw a transistor diagram of a CMOS gate with the following logical

    F (a, b​​, c) = (a * b + a * c + b * c) '

    The gate must be made up of only One pull-up and a pull-down network. It should be connected in the same step not be linked to several steps with AND, OR and NOT gates in succession, one after another.

    I am not asking anyone to solve my task
    I have read and been understanding how CMOS transistors working
    but I was a little difficulty to construct the gate. Is it any particular method for constructing logic gates???
  2. Georacer


    Nov 25, 2009
  3. mr_l

    Thread Starter New Member

    Aug 20, 2011
    It was of great help. I have solved the task. Thank you very much.