Constructing truth table and drawing circuit

Discussion in 'Homework Help' started by jpmcfly, Mar 10, 2007.

  1. jpmcfly

    Thread Starter New Member

    Mar 10, 2007
    3
    0
    I am currently working on an exercise that I was given in class a few weeks ago but am unsure about where to start

    I have been given the boolean expression:

    O/P = W.X'.Y.Z + W.X'.Y.Z' + W.X.Y.Z' + W.X.Y.Z + W.X.Y'.Z' + W.X.Y'.Z

    I have been asked from this to draw up a truth table to define the outputs and then draw the original circuit.

    Can someone please give me a few pointers on how to go about this.

    Kind regards
    John Paul
     
  2. Dave

    Retired Moderator

    Nov 17, 2003
    6,960
    143
    Hi John Paul,

    To create your truth table just write up every input combination in binary order, i.e:

    W-X-Y-Z-O/P
    ---------
    0-0-0-0-?
    0-0-0-1-?
    0-0-1-0-?
    0-0-1-1-?
    0-1-0-0-?
    0-1-0-1-?
    0-1-1-0-?
    0-1-1-1-?
    1-0-0-0-?
    1-0-0-1-?
    1-0-1-0-?
    1-0-1-1-?
    1-1-0-0-?
    1-1-0-1-?
    1-1-1-0-?
    1-1-1-1-?

    What you are trying to do is if find the ? for each input combination.

    For each combination of inputs, where a '1' implies a true variable i.e. W, X, Y or Z and '0' implies a negated variable, i.e. W', X', Y' or Z', go through your equation and where there is a group that corresponds to an input combination put a '1' in the output (O/P) column. For example, W.X'.Y.Z would mean putting a '1' in the output column for 1-0-1-1.

    As for drawing the original circuit, assuming you have no simplification of the circuit to do, then whereever there is a '.' you need an AND gate, and whereever you see a '+' you need an OR gate. As for the negated inputs, i.e. W', X' etc you shoudl ask your tutor if the negated functions are available or if you have to derive them, in which case you will need NOT gates to derive the negated variables from the real variables.

    If you are unfamiliar with the terminology outlined here, refer to Volume IV - Chapter 3 on logic gates.

    Dave
     
  3. jpmcfly

    Thread Starter New Member

    Mar 10, 2007
    3
    0
    Hey Dave and thanks for the reply.

    Is there any chance you could show me what this circuit would look like?
     
  4. jpmcfly

    Thread Starter New Member

    Mar 10, 2007
    3
    0
    The truth table for this looked as follows:

    W X Y Z OUTPUT’
    0 0 0 0 0
    0 0 0 1 0
    0 0 1 0 0
    0 0 1 1 0
    0 1 0 0 0
    0 1 0 1 0
    0 1 1 0 0
    0 1 1 1 0
    1 0 0 0 0
    1 0 0 1 0
    1 0 1 0 1
    1 0 1 1 1
    1 1 0 0 1
    1 1 0 1 1
    1 1 1 0 1
    1 1 1 1 1


    And The K-Map was as follows:

    WX
    0 0 1 0
    YZ 0 0 1 0
    0 0 1 1
    0 0 1 1

    I do not know if this is correct but I have come up with the final boolean expression O/P = (W.X) + (W.Y)

    Could someone tell me if this is being done correctly and if so can this expression be simplified further using any of the boolean laws.

    Thank you
    JP
     
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