Hi to every one I'm generating the 50 Hz frequency pulses using compare mode but code is excuting correctly but its not working .Here is my code .
#define _XTAL_FREQ 24000000 // set crystal oscillator to 20MHz.
#define TMR1PRESCALE 8
#include <htc.h>
#include <pic18.h>
//#define OUT RC1 // use the name OUT for RC2 pin.
void ms_delay(unsigned int delay);
void ECCP1_Initialize(void);
#include <xc.h>
// CONFIG1L
#pragma config PLLSEL = PLL4X // PLL Selection (4x clock multiplier)
#pragma config CFGPLLEN = OFF // PLL Enable Configuration bit (PLL Disabled (firmware controlled))
#pragma config CPUDIV = NOCLKDIV// CPU System Clock Postscaler (CPU uses system clock (no divide))
#pragma config LS48MHZ = SYS24X4// Low Speed USB mode with 48 MHz system clock (System clock at 24 MHz, USB clock divider is set to 4)
// CONFIG1H
#pragma config FOSC = HSH // Oscillator Selection (HS oscillator, high power 16MHz to 25MHz)
#pragma config PCLKEN = ON // Primary Oscillator Shutdown (Primary oscillator enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config nPWRTEN = OFF // Power-up Timer Enable (Power up timer disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable (BOR enabled in hardware (SBOREN is ignored))
#pragma config BORV = 190 // Brown-out Reset Voltage (BOR set to 1.9V nominal)
#pragma config nLPBOR = OFF // Low-Power Brown-out Reset (Low-Power Brown-out Reset disabled)
// CONFIG2H
#pragma config WDTEN = ON // Watchdog Timer Enable bits (WDT enabled in hardware (SWDTEN ignored))
#pragma config WDTPS = 32768 // Watchdog Timer Postscaler (1:32768)
// CONFIG3H
#pragma config CCP2MX = RC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config T3CMX = RC0 // Timer3 Clock Input MUX bit (T3CKI function is on RC0)
#pragma config SDOMX = RB3 // SDO Output MUX bit (SDO function is on RB3)
#pragma config MCLRE = ON // Master Clear Reset Pin Enable (MCLR pin enabled; RE3 input disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port Enable (ICPORT disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled)
// CONFIG5L
#pragma config CP0 = OFF // Block 0 Code Protect (Block 0 is not code-protected)
#pragma config CP1 = OFF // Block 1 Code Protect (Block 1 is not code-protected)
#pragma config CP2 = OFF // Block 2 Code Protect (Block 2 is not code-protected)
#pragma config CP3 = OFF // Block 3 Code Protect (Block 3 is not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protect (Boot block is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protect (Data EEPROM is not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Block 0 Write Protect (Block 0 (0800-1FFFh) is not write-protected)
#pragma config WRT1 = OFF // Block 1 Write Protect (Block 1 (2000-3FFFh) is not write-protected)
#pragma config WRT2 = OFF // Block 2 Write Protect (Block 2 (04000-5FFFh) is not write-protected)
#pragma config WRT3 = OFF // Block 3 Write Protect (Block 3 (06000-7FFFh) is not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Registers Write Protect (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protect (Boot block (0000-7FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protect (Data EEPROM is not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Block 0 Table Read Protect (Block 0 is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Block 1 Table Read Protect (Block 1 is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Block 2 Table Read Protect (Block 2 is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Block 3 Table Read Protect (Block 3 is not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protect (Boot block is not protected from table reads executed in other blocks)
// variables and constants declarations
unsigned long CCPR = 0; // holds the value needed to be put in CCP's registers.
unsigned long current_period = 0; // holds the period that timer1 will use.
const unsigned long total_period = 12500; // 20ms for 50hz frequency.
// interrupt service routine
void interrupt tmr1isr () {
if (PIR2bits.CCP2IF == 1) { // if CCP compare interrupt flag is set
PIR2bits.CCP2IF = 0; // reset CCP2 interrupt flag.
if ((current_period > 0) && (current_period < total_period)){ // if duty is > 0% AND < 100% then:
if (PORTCbits.RC1== 1) { // if the output was 1 -> was "on-time".
PORTCbits.RC1 = 0; // set output to 0 in order to achieve "off-time".
CCPR = total_period - current_period; // make it time for "off-time", off-time = full time - on time.
}
else { // if the output was 0 -> was "off-time".
PORTCbits.RC1 = 1; // set output to 1 in order to achieve "on-time"
CCPR = current_period; // make it time for "on-time".
}
}
else {
if (current_period == total_period) { PORTCbits.RC1== 1;} // if duty = 100%, then output 1 all the time.
if (current_period == 0) {PORTCbits.RC1== 0;} // if duty = 0%, then output 0 all the time.
}
// now set the value of CCPR into CCP module's registers:
CCPR2H = CCPR >> 8; // right-shift CCPR by 8 then load it into CCPR1H register (load higher byte).
CCPR2L = CCPR; // put the lower byte of CCPR in CCPR1L register.
}
}
// main function:
void main()
{
ANSELA=0X00;
ANSELB=0X00;
ANSELC=0X00;
ANSELD=0X00;
TRISC=0X00;
TRISB=0X00;
PORTB=0X00;
PORTC=0X00;
TRISB= 0x00; // port c is output.
PORTB=0X00;
ECCP1_Initialize( );
while (1)
{ // infinite loop.
PORTBbits.RB7 = 1;
__delay_ms(5);
PORTBbits.RB7 = 0;
__delay_ms(5);
// TEST CODE...
current_period = total_period * 0.06;
ms_delay(200);
current_period = total_period * 0.1;
current_period = total_period * 0.2;
ms_delay(200);
current_period = total_period * 0.3;
ms_delay(200);
current_period = total_period * 0.4;
ms_delay(200);
current_period = total_period * 0.5;
}
}
void ms_delay(unsigned int delay)
{
unsigned int delayinms;
for(delayinms=0;delayinms<delay;delayinms++)
{
__delay_ms(10);
}
}
void ECCP1_Initialize(void)
{
INTCONbits.GIE = 1;// INTCON = 0xC0; // enable global and peripheral interrupt.
INTCONbits.PEIE = 1;
CCP2CON = 0x0B;
// CCPR1L 0;
CCPR1L = 0x00;
// CCPR1H 0;
CCPR1H = 0x00;
PIR2bits.CCP2IF = 0; // clear CCP1 interrupt flag.
// Enable the ECCP1 interrupt
PIE2bits.CCP2IE = 1;
// Selecting Timer1
CCPTMRSbits.C1TSEL = 0x0;
T1GCON = 0x00;
TMR1H = 0x00; // timer1 registers have 0 (clear).
TMR1L = 0x00;
// Set the ECCP1 to the options selected in the User Interface
PIR1bits.TMR1IF = 0;
// Enabling TMR1 interrupt.
PIE1bits.TMR1IE = 1;
// CCP1M Special Event Trigger; DC1B 0; P1M single;
T1CON = 0X33; // start timer1 with the same settings like before.
}
#define _XTAL_FREQ 24000000 // set crystal oscillator to 20MHz.
#define TMR1PRESCALE 8
#include <htc.h>
#include <pic18.h>
//#define OUT RC1 // use the name OUT for RC2 pin.
void ms_delay(unsigned int delay);
void ECCP1_Initialize(void);
#include <xc.h>
// CONFIG1L
#pragma config PLLSEL = PLL4X // PLL Selection (4x clock multiplier)
#pragma config CFGPLLEN = OFF // PLL Enable Configuration bit (PLL Disabled (firmware controlled))
#pragma config CPUDIV = NOCLKDIV// CPU System Clock Postscaler (CPU uses system clock (no divide))
#pragma config LS48MHZ = SYS24X4// Low Speed USB mode with 48 MHz system clock (System clock at 24 MHz, USB clock divider is set to 4)
// CONFIG1H
#pragma config FOSC = HSH // Oscillator Selection (HS oscillator, high power 16MHz to 25MHz)
#pragma config PCLKEN = ON // Primary Oscillator Shutdown (Primary oscillator enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config nPWRTEN = OFF // Power-up Timer Enable (Power up timer disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable (BOR enabled in hardware (SBOREN is ignored))
#pragma config BORV = 190 // Brown-out Reset Voltage (BOR set to 1.9V nominal)
#pragma config nLPBOR = OFF // Low-Power Brown-out Reset (Low-Power Brown-out Reset disabled)
// CONFIG2H
#pragma config WDTEN = ON // Watchdog Timer Enable bits (WDT enabled in hardware (SWDTEN ignored))
#pragma config WDTPS = 32768 // Watchdog Timer Postscaler (1:32768)
// CONFIG3H
#pragma config CCP2MX = RC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config T3CMX = RC0 // Timer3 Clock Input MUX bit (T3CKI function is on RC0)
#pragma config SDOMX = RB3 // SDO Output MUX bit (SDO function is on RB3)
#pragma config MCLRE = ON // Master Clear Reset Pin Enable (MCLR pin enabled; RE3 input disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port Enable (ICPORT disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled)
// CONFIG5L
#pragma config CP0 = OFF // Block 0 Code Protect (Block 0 is not code-protected)
#pragma config CP1 = OFF // Block 1 Code Protect (Block 1 is not code-protected)
#pragma config CP2 = OFF // Block 2 Code Protect (Block 2 is not code-protected)
#pragma config CP3 = OFF // Block 3 Code Protect (Block 3 is not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protect (Boot block is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protect (Data EEPROM is not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Block 0 Write Protect (Block 0 (0800-1FFFh) is not write-protected)
#pragma config WRT1 = OFF // Block 1 Write Protect (Block 1 (2000-3FFFh) is not write-protected)
#pragma config WRT2 = OFF // Block 2 Write Protect (Block 2 (04000-5FFFh) is not write-protected)
#pragma config WRT3 = OFF // Block 3 Write Protect (Block 3 (06000-7FFFh) is not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Registers Write Protect (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protect (Boot block (0000-7FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protect (Data EEPROM is not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Block 0 Table Read Protect (Block 0 is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Block 1 Table Read Protect (Block 1 is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Block 2 Table Read Protect (Block 2 is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Block 3 Table Read Protect (Block 3 is not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protect (Boot block is not protected from table reads executed in other blocks)
// variables and constants declarations
unsigned long CCPR = 0; // holds the value needed to be put in CCP's registers.
unsigned long current_period = 0; // holds the period that timer1 will use.
const unsigned long total_period = 12500; // 20ms for 50hz frequency.
// interrupt service routine
void interrupt tmr1isr () {
if (PIR2bits.CCP2IF == 1) { // if CCP compare interrupt flag is set
PIR2bits.CCP2IF = 0; // reset CCP2 interrupt flag.
if ((current_period > 0) && (current_period < total_period)){ // if duty is > 0% AND < 100% then:
if (PORTCbits.RC1== 1) { // if the output was 1 -> was "on-time".
PORTCbits.RC1 = 0; // set output to 0 in order to achieve "off-time".
CCPR = total_period - current_period; // make it time for "off-time", off-time = full time - on time.
}
else { // if the output was 0 -> was "off-time".
PORTCbits.RC1 = 1; // set output to 1 in order to achieve "on-time"
CCPR = current_period; // make it time for "on-time".
}
}
else {
if (current_period == total_period) { PORTCbits.RC1== 1;} // if duty = 100%, then output 1 all the time.
if (current_period == 0) {PORTCbits.RC1== 0;} // if duty = 0%, then output 0 all the time.
}
// now set the value of CCPR into CCP module's registers:
CCPR2H = CCPR >> 8; // right-shift CCPR by 8 then load it into CCPR1H register (load higher byte).
CCPR2L = CCPR; // put the lower byte of CCPR in CCPR1L register.
}
}
// main function:
void main()
{
ANSELA=0X00;
ANSELB=0X00;
ANSELC=0X00;
ANSELD=0X00;
TRISC=0X00;
TRISB=0X00;
PORTB=0X00;
PORTC=0X00;
TRISB= 0x00; // port c is output.
PORTB=0X00;
ECCP1_Initialize( );
while (1)
{ // infinite loop.
PORTBbits.RB7 = 1;
__delay_ms(5);
PORTBbits.RB7 = 0;
__delay_ms(5);
// TEST CODE...
current_period = total_period * 0.06;
ms_delay(200);
current_period = total_period * 0.1;
current_period = total_period * 0.2;
ms_delay(200);
current_period = total_period * 0.3;
ms_delay(200);
current_period = total_period * 0.4;
ms_delay(200);
current_period = total_period * 0.5;
}
}
void ms_delay(unsigned int delay)
{
unsigned int delayinms;
for(delayinms=0;delayinms<delay;delayinms++)
{
__delay_ms(10);
}
}
void ECCP1_Initialize(void)
{
INTCONbits.GIE = 1;// INTCON = 0xC0; // enable global and peripheral interrupt.
INTCONbits.PEIE = 1;
CCP2CON = 0x0B;
// CCPR1L 0;
CCPR1L = 0x00;
// CCPR1H 0;
CCPR1H = 0x00;
PIR2bits.CCP2IF = 0; // clear CCP1 interrupt flag.
// Enable the ECCP1 interrupt
PIE2bits.CCP2IE = 1;
// Selecting Timer1
CCPTMRSbits.C1TSEL = 0x0;
T1GCON = 0x00;
TMR1H = 0x00; // timer1 registers have 0 (clear).
TMR1L = 0x00;
// Set the ECCP1 to the options selected in the User Interface
PIR1bits.TMR1IF = 0;
// Enabling TMR1 interrupt.
PIE1bits.TMR1IE = 1;
// CCP1M Special Event Trigger; DC1B 0; P1M single;
T1CON = 0X33; // start timer1 with the same settings like before.
}