Common-emitter ideal BJT

Discussion in 'General Electronics Chat' started by Eduard Munteanu, Sep 1, 2007.

  1. Eduard Munteanu

    Thread Starter Active Member

    Sep 1, 2007
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    Hello everybody. I'm first going to state that I'm asking this question to understand the way BJTs work, rather than build something practically, so characteristic curves and such should be my least concern.

    Let there be a common-emitter amplifier, with R1 and R2 as the base biasing voltage divider resistors. The BJT is driven as a VCVS, with voltage gain given by -Rc/Re. So I set the DC gain to be quiescent output voltage divided by DC bias voltage (VBE) by choosing a specific Re. The AC gain is then set by placing a capacitor and a resistor in parallel with Re (the capacitor and the resistor are in series) which lowers the actual emitter resistance at AC frequencies, because AC gain > DC gain.

    As far as I can see (Horowitz & Hill and some websites), VBE (AC + DC components) should be 0.6V +- 0.1V to stay within the active region. Given this condition is respected and enough base current is provided, I should expect an exact quiescent output voltage and output voltage swing (given the input voltage swing is known).

    In short, I'm using the following thinking pattern and equations for setting the base bias:
    Ic = Vcc / Rc
    Ic ~= Ie => Ve = Ic * Re
    Vb = Ve + 0.6V
    and then solving for R1 and R2 at that given Vb and a high-enough Ib.

    But for some reason, I don't manage to set the quiescent point properly. GNUCap, ng-spice and spice all show a way-too-low quiescent output voltage. I have tried with both Oregano's ideal NPN BJT model (Oregano is a Linux EDA tool) and an official 2N2222A NPN BJT model.

    Is my design flawed? Where do I go wrong? Should I be looking for an another design pattern, like a CCCS which shoots current at a load resistance?

    (By the way, I've also tried including the intrinsic series emitter resistance in my calculations.)
     
  2. hgmjr

    Moderator

    Jan 28, 2005
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    The expression for Ic is:

    Ic = \frac{(Vcc-Vc)}{Rc} Where Vc is the voltage at the collector set by the base bias resistors R1 and R2 in your example.

    The expression you have employed will predict a current that is roughly double what you would normally encounter as the quiescent collector voltage is generally set to VCC divided by 2.

    Ic can indeed be estimated to be roughly equal to Ie provided the current gain or beta of the transistor you are using is around 100 or greater.

    Vb is generally approximated as Ve +0.6v as you have stated.

    Hopefully these comments will set you back on the correct track. If not, please feel free to followup with further questions.

    My comments above are predicated on the assumption that the transistor stage under discussion is operating on a single supply and that the quiescent emitter voltage Ve is less than 10% of Vcc.

    You may find the AAC tutorial on common emitter amplifier design to be helpful. If you start at the link provide and read further you will come to the section on feedback. In this section, there is a presentation of the use of an emitter resistor to provide gain stabilizing feedback.

    hgmjr
     
  3. Eduard Munteanu

    Thread Starter Active Member

    Sep 1, 2007
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    That's right, I made quite a stupid mistake for Ic. I forgot about the current source/sink nature of the collector.

    After dealing with this and the capacitors' reactances (which were too high), now it works. The strange thing is that I get very precise results with a real 2N2222A model, but the ideal model has an error of about +1.5 V for the quiescent output voltage (with or without compensating for the intrinsic series emitter resistance). But my feeling is that SPICE & GNUCap don't really work well with simple device description models.

    Two questions arise though:
    1) What would the maximum worst-case voltage gain be, for a given worst-case hFE? Do I need to "switch" to a CCCS-shooting-at-a-load thinking model to determine it?
    2) How do I amplify input voltage swings higher than 0.1V in this VCVS-like situation? According to what I know, higher swings will put the transistor outside the active-region. Is it possible to do it?

    I had read that tutorial some time ago, but the combined info (Horowitz & Hill + this one + a book on electronic devices' physics) made me see the whole picture correctly.

    Thanks a lot for your help, your directions have been really useful.
     
  4. hgmjr

    Moderator

    Jan 28, 2005
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    I'm not totally clear on your question 1.

    As to question number 2, the maximum peak-to-peak output voltage swing available to an amplifier is dictated by the power supply used. If the output of the amplifier is clipping on the positive or negative peak for a given input signal level then there are two ways for you to move the operating point back into the linear region. You can reduce the overall gain of the amplifier or you can increase the voltage output of the power supply. Both of these measures will require the base bias to be adjusted to recenter the quiescent dc output voltage at the collector of the CE amplifer stage.

    hgmjr
     
  5. Eduard Munteanu

    Thread Starter Active Member

    Sep 1, 2007
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    1) You kinda answered this one in the second question. Beta = hFE is the maximum current gain for a transistor (i.e. it's a hard limit). I thought voltage gain is also limited by some transistor parameters. If I remember correctly from Horowitz & Hill, the grounded emitter CE amplifier's voltage gain is given by -Rc/re (re is the intrinsic emitter resistance; re = VT / Ic). But choosing a high Rc would theoretically yield unlimited voltage amplification (for suitable Vcc). Am I right?

    2) I wasn't talking about the output voltage swing. Horowitz & Hill and some other websites say there is little change in the base-emitter voltage drop beyond 0.6V + 0.1V, where 0.1V is the amplitude of the input signal. So, if I feed a signal with a higher voltage amplitude into the base-emitter junction of a BJT, it will simply go into saturation or cut-off for instantaneous VBE higher than 0.7V or lower than 0.5V. Let's say the input is a sine-wave voltage source of 0.5V; is there any way I can feed that signal into a BJT without clipping, without prior reduction of it's amplitude?
     
  6. hgmjr

    Moderator

    Jan 28, 2005
    9,030
    214
    Assuming that you are still referring to a CE BJT amplifier with a resistor in the emitter as I believe your original post stated you were investigating, the emitter resistance is reflected back into the base as a resistance that is the approximate product of beta and the resistance. For example, if you had a 100 ohm emitter resistor then the input impedance looking into the base and discounting the resistance of the base bias network would be 100 (assumed beta) time 100 which comes to 10K. I mention this because with the emitter resistor present, Vbe will be 0.7 volts but the emitter is not directly tied to ground so the voltage at the base is free to swing within limits of course.

    hgmjr
     
  7. Eduard Munteanu

    Thread Starter Active Member

    Sep 1, 2007
    86
    0
    I got it, thanks for your help.
     
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