Hello everybody. I'm first going to state that I'm asking this question to understand the way BJTs work, rather than build something practically, so characteristic curves and such should be my least concern.
Let there be a common-emitter amplifier, with R1 and R2 as the base biasing voltage divider resistors. The BJT is driven as a VCVS, with voltage gain given by -Rc/Re. So I set the DC gain to be quiescent output voltage divided by DC bias voltage (VBE) by choosing a specific Re. The AC gain is then set by placing a capacitor and a resistor in parallel with Re (the capacitor and the resistor are in series) which lowers the actual emitter resistance at AC frequencies, because AC gain > DC gain.
As far as I can see (Horowitz & Hill and some websites), VBE (AC + DC components) should be 0.6V +- 0.1V to stay within the active region. Given this condition is respected and enough base current is provided, I should expect an exact quiescent output voltage and output voltage swing (given the input voltage swing is known).
In short, I'm using the following thinking pattern and equations for setting the base bias:
Ic = Vcc / Rc
Ic ~= Ie => Ve = Ic * Re
Vb = Ve + 0.6V
and then solving for R1 and R2 at that given Vb and a high-enough Ib.
But for some reason, I don't manage to set the quiescent point properly. GNUCap, ng-spice and spice all show a way-too-low quiescent output voltage. I have tried with both Oregano's ideal NPN BJT model (Oregano is a Linux EDA tool) and an official 2N2222A NPN BJT model.
Is my design flawed? Where do I go wrong? Should I be looking for an another design pattern, like a CCCS which shoots current at a load resistance?
(By the way, I've also tried including the intrinsic series emitter resistance in my calculations.)
Let there be a common-emitter amplifier, with R1 and R2 as the base biasing voltage divider resistors. The BJT is driven as a VCVS, with voltage gain given by -Rc/Re. So I set the DC gain to be quiescent output voltage divided by DC bias voltage (VBE) by choosing a specific Re. The AC gain is then set by placing a capacitor and a resistor in parallel with Re (the capacitor and the resistor are in series) which lowers the actual emitter resistance at AC frequencies, because AC gain > DC gain.
As far as I can see (Horowitz & Hill and some websites), VBE (AC + DC components) should be 0.6V +- 0.1V to stay within the active region. Given this condition is respected and enough base current is provided, I should expect an exact quiescent output voltage and output voltage swing (given the input voltage swing is known).
In short, I'm using the following thinking pattern and equations for setting the base bias:
Ic = Vcc / Rc
Ic ~= Ie => Ve = Ic * Re
Vb = Ve + 0.6V
and then solving for R1 and R2 at that given Vb and a high-enough Ib.
But for some reason, I don't manage to set the quiescent point properly. GNUCap, ng-spice and spice all show a way-too-low quiescent output voltage. I have tried with both Oregano's ideal NPN BJT model (Oregano is a Linux EDA tool) and an official 2N2222A NPN BJT model.
Is my design flawed? Where do I go wrong? Should I be looking for an another design pattern, like a CCCS which shoots current at a load resistance?
(By the way, I've also tried including the intrinsic series emitter resistance in my calculations.)