Common Emitter Class A Amplifier

Discussion in 'Homework Help' started by pkrcat, Dec 11, 2009.

  1. pkrcat

    Thread Starter New Member

    Dec 7, 2009
    4
    0
    Hi there everybody, I'm doing a course on electronics and I've been landed with an assignment I'm really stumped by. I've put quite a lot of time into trying to understand this but as I'm working off dribs and drabs from my college tutor along with some vague web tutorials I'm kind of at a loose end.

    I'll post what I've got so far along with a schematic

    The task is to design and built a common emitter class A amplifier using the
    BJT Q2N2222 transistor and the following specifications:

    Vcc = 18v
    Lower cut-off frequency must be 210 Hz
    Upper cut-off frequency must be 500 kHz
    Gain β = 95
    Rout = 17kΩ
    Vin = 7mVrms
    The collector current at operating point Icq is 10mA

    I've tried the following calculations but the results indicate they seem to have gone quite badly wrong. .

    Vce = 0.5 x Vcc = 9V

    Ic = Vcc - Vce / Rout
    = 18-9 / 17000
    =5.29 e-4 A

    I've been told to use Ve = 3V, I really have no idea why, I'd like to know where this comes from

    Vout = Gv x Vin
    = 95 x 7e-3
    =0.665Vrms
    =0.940 Vpeak

    Total voltage swing = 0.94 x 2 = 1.88V peak to peak

    Rc = Vcc - Ve - Vce / Ic
    = (18 - 3 - 9) / 10e-3
    =600Ω

    Re = Vce / Ic
    = 3 / (10e-3)
    =300Ω

    Next I need to calculate IBq, I've been told that you should use the maximum gain for the transistor being used, 180, giving the equation;

    IBq = 10e-3/180 = 5.56e-5

    Unfortunately this is where it all goes pear shaped and my R1 and R2 values are a bit crazy.

    Below are screenshots of what I simulated, even if they are way, way off I'll just put them here anyway

    [​IMG]http://yfrog.com/jascreenshotczj
    http://yfrog.com/j0schematicj

    Sorry about the long post, any help with this would be very greatly appreciated

    Thanks guys :)
     
    Last edited: Dec 12, 2009
  2. hobbyist

    Distinguished Member

    Aug 10, 2008
    764
    56
    I'm not very much help compared to other more experianced posters on this board.

    But I'll try to get you on the right track, since you said your way off base with this at the moment.

    So here goes:

    First your RL is 17K ohms, that would be the Load itself, not the output impedance.


    Your VC should be 9v. (half the supply voltage) which is the voltage from ground to the collector terminal, when using a emitter resistor for stabilization, then the VC will be (VCE + VE), = 9v.

    So your RC (collector resistor) shouild be around 10 x less so as to develope a substantial signal across the load. (less is better, if feasible with respect to the gain needed)

    According to the parameters given the ICQ is given so RC will be a set value calculated by (Vc / ICQ)
    where VC = (1/2 x VCC)


    Once you get the RC established then using the VE of 3v. specified should calculate out for the emitter resistor (RE) needed.

    You may need to juggle the RC value to get a substantial gain with respect to the emitter resistor calculated.
    You may have to juggle both resistor values to achieve proper gain and voltages needed.

    Only calculations and prototyping will tell.

    If you use voltage divider biasing, then make the bottom ground resistor to base (RB1) around 10 x greater than RE.

    Heres how I prototyped it:

    VC = (VCC / 2)
    ICQ = 10mA.
    RC = (VC / ICQ)
    VE = 3v.
    RE = (VE / ICQ)
    RB1 = (10 x RE)
    VB = (VE + Vbe)
    ID = (VB / RB1)
    RB2 = {(VCC - VB) / ID}

    This will give a very small DC GAIN (RC / RE)

    Then calculate the proper value Capacitor needed to bypass the emitter resistor (RE), so as to aquire the proper Vout across the load. (within the bandwidth specified)

    see if this helps.
     
    Last edited: Dec 11, 2009
  3. pkrcat

    Thread Starter New Member

    Dec 7, 2009
    4
    0
    Thanks for your reply, I should have mentioned that RL is the output impedence as it is being used to feed a second stage, it is at that that point the dc gain needs to be 95
     
  4. Audioguru

    New Member

    Dec 20, 2007
    9,411
    896
    The beta of the transistor is said to be 95, not the DC gain of the entire circuit.
    The circuit is an AC amplifier, not a DC amplifier.

    RL is a load impedance, not an output impedance. RL is probably the input impedance of the circuit that is driven from this transistor.
     
  5. pkrcat

    Thread Starter New Member

    Dec 7, 2009
    4
    0
    Thanks, β= 95 is what I was trying to say, confusing myself here.

    The output impedence is definitely meant to be 17kΩ as seen in the screenshot. I shouldn't have called it RL, I'll refer to it as Rout from now on. This is what the end product should more or less look like


    [​IMG]
     
  6. pkrcat

    Thread Starter New Member

    Dec 7, 2009
    4
    0
    Ok, I've tried using the calculations above but my trace isn't looking pretty at all, I have the values below

    VAC = 0.7mV
    Vcc = 18V
    Vc = 9V
    Ve = 3V

    β = 95

    Rout = 17k
    Rc = 900Ω
    Re = 300Ω

    RB1 = 3kΩ
    RB2 = 12kΩ

    ICQ = 10mA
    ID = 1.2mA
    VBE = 0.6V
    VB = 3.6V

    C1, C2 = 7.58 e-5F
    CE = 5.05e-5F

    [​IMG]
     
  7. hobbyist

    Distinguished Member

    Aug 10, 2008
    764
    56
    Your problem is in the base resistors
    there backwards 3K should be the bottom and 12K the top resistor.

    When I said RB1 and RB2, that was the nomenclatures I gave them.

    That's where you got messed up, your simulator put the R1 and R2 in different locations.
    The base to ground resistor should always be smaller than the base to supply resistor, for a linear amp stage.

    A good procedure is after a stage is built, check the voltage bias at both the collector terminal and the base terminal, to see if there close to calculated values.
     
    Last edited: Dec 12, 2009
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