cmos transistor

Discussion in 'The Projects Forum' started by pramodkumar, Aug 26, 2012.

  1. pramodkumar

    Thread Starter New Member

    Aug 26, 2012
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    Hi,

    I want to know what exactly mean by cmos latch up?
    please reply
     
  2. DickCappels

    Moderator

    Aug 21, 2008
    2,653
    632
    In the structure of most if not all CMOS inverters, there is a parasitic SCR that can be triggered if the VDD or VSS is exceeded and sufficient current is drawn. When that happens, the effect is like shorting VDD to VSS and things get hot in a hurry.
     
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  3. crutschow

    Expert

    Mar 14, 2008
    13,014
    3,234
    The parasitic SCR is triggered by substrate current, either from excess Vdd causing breakdown current, or excess positive or negative input voltage causing large currents through the input protection diodes.

    The SCR can also be triggered by substrate photo currents generated by high ionizing radiation levels (but that normally requires a nuclear explosion in the vicinity). ;)
     
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