Clock Noise EMI Infesting Ground

Discussion in 'General Electronics Chat' started by liquidair, Mar 10, 2016.

  1. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    Hi All,

    Background: I have a 2 layer board with Atmega164 (SMD) running from an external 8MHz crystal. There's a ground island underneath the micro with local 100nF decoupling caps, a bulk 3900uF cap, and two series regulators, and the crystal circuit pretty much follows the ATMEL layout notes without the ground island on the top layer too. The crystal is placed < .5" from the uC, as tight as I could get it with the load caps and the nearest decoupling cap, with the crystal on it's own in the corner. I've read like 3 books on EMC and like hundreds of app notes, so I felt like I knew what I was doing but everywhere I can measure, I see about 2mV of clock harmonics (30-100MHz range) on both the power and ground traces/islands, even traces a foot away. The interference's polarity changes if I inspect ground vs. power, so it appears conducted.

    I've tried throwing SMD ferrite beads (1k @ 100MHz...the widest bandwidth devices I could find) at the problem to see if I can track it down, but I've only managed to reduce the noise by a little. I've tried configuring the uC osc, and surprisingly fullswing appears to give the lowest noise, even over the internal clock. I've also added a few more ceramic caps in places, no change. I notice a slight change in frequency or something when I touch the crystal's case, but every other place I've touched doesn't affect things.

    Questions: Is there a way to track this down using the basic scope/signal gen/DMM toolkit? At 8MHz+, I'd think return current would flow directly under the traces back to the source, so how is it going everywhere? Given that it appears differential, from power to ground (and every trace connected to the supply) I assume that means it doesn't have an easy enough path back to ground from a capacitive coupling path (I assume to power), could this be correct? Any clues I'm missing?

    I'm sure there's questions I don't even know to ask and details I've left out but thank you for reading/helping! I'm at my wits end!
     
  2. Sensacell

    Well-Known Member

    Jun 19, 2012
    1,127
    266
    Note that you may have done "everything right" - and there is still noise, there will always be noise, the question is:
    Is this noise a problem?

    It's only a problem if:

    1) The system doesn't work.

    2) You fail EMC testing.
     
    Last edited: Mar 10, 2016
  3. Robin Mitchell

    Well-Known Member

    Oct 25, 2009
    732
    199
    One tactic you can try is stitching vias. Have ground planes on both sides and create a "wall of vias" around you noise generating parts. This creates a Faraday cage around the noisy parts and helps to improve EMI performance.

    [​IMG]
     
    cmartinez likes this.
  4. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    Thank you for the replies!

    @Sensacell: Ya, the device works well but fails class B emissions. Passes class A, although not useful. The radiation is occurring at some low-speed digital output jacks. Every trace there has the noise on it, including ground for the cable shield. So while I may be able to filter the outputs there, the shield will still have problems. Maybe it is enough to drop the levels enough to pass, but finding the source is generally a better solution.

    @Robin Mitchell: Very interesting, I've never seen this before but it makes complete sense. Problem is right now I can't redesign, although this is going in my 'toolkit'. My only solution at this point is to filter it out.
     
    Last edited: Mar 10, 2016
  5. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    Hi everyone, I tried some fixes and sent the unit back only to fail EMC again. It's beyond my current ability/understanding to fix it. Any advice on what to do? Are there places/businesses that you can recommend that I can send the device to and have them track down the issue?

    Thank you for your help!
     
  6. kubeek

    AAC Fanatic!

    Sep 20, 2005
    4,669
    804
    Posting the schematic and layout would be your cheapest option to get advice. Borrowing a spectrum analyzer and some near-field probes is the second easiest, since you know at which frequencies you fail you should be able to easily find where the interference is radiating.
     
    trinalynnestar and liquidair like this.
  7. GopherT

    AAC Fanatic!

    Nov 23, 2012
    5,984
    3,719
    There are plenty of companies making EMI shielding / EMI absorbing "patches" made of ferrite-filled elastomers or even metal cages or other tricks that can either keep EMI in or out. Laird has several options - the higher the frequency, the more options that exist. 8MHz may be a difficult zone but some options should be there.

    Also, look at your circuit. High current signals sues more trouble than low current signals. It there any way to increase resistor values on the output pins of the micro? Any way to add caps right at the power supply pins of the micro? Small ceramic caps like 0.1uF and a 0.001uF.

    If you do redesign the board, remember that the magnetic fields (inductance) of Rf signals travel by line-of-sight back to ground. Also, ground traces that are long and narrow are not exactly at ground (resistance of the copper) - some flood-filled ground areas should surround your signals that cause interference.

    As Robin mentions above, air gaps in the board are good ways to stop inductive signals. Slits and holes in the board are great.
     
    Last edited: Apr 13, 2016
    liquidair likes this.
  8. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    Kubeek: Thank you! I don't know how I could post either, both are huge. I'd also prefer it stay private. I know this shoots my own foot in a way. Any advice on where to rent/borrow the required tools?

    GopherT: Thank you! I don't have resistors on the output pins of the uC save pullups. I do have 0.1uF ceramics on all the power pins.

    Your 3rd paragraph actually makes me think. I used a single power supply for 12V and 5V systems, and I cascaded them so the input power is regulated down to 12V and there's a smaller 100uF cap before I split the supply paths with diodes. The 12V supply post diode has a large cap and everything is fed and returns to it. The 5V path is then regulated again and we use a large reservoir cap there for the digital. Ground for these supplies is pretty much a straight line 'island' so the 12V and 5V reservoir caps share this island and are maybe 1 inch apart. The chassis ground is taken from a point in the middle of the two. There's no slit between them. Hmm...

    Then also, the uC is in the front corner of the chassis. The rear of the chassis where I'm failing EMC has it's own PCB and a digital section with outputs and it's about 14 inches away line of site. I bring the i2C data lines, USART, and power/gnd from the uC via shielded twisted pair with the shield connected at the uC end only to ground. The ground reference for this rear board's GND 'island' comes from the 5V island near the uC. But I'm only using one ground wire so at the ~17in cable run, this is high resistance and inductance huh? Maybe I should ground connect the shields at the rear board's island too to reduce the ground impedance? I was worried about ground loops between the shields and also between the shields and ground conductor.

    Also, moving any chance the chassis ground further back towards the beginning of 12V/5V supply (say at the small 100uF cap where the supplies split) could help? Or maybe even forward to the rear panel?

    Thanks so much you guys!
     
  9. SLK001

    Well-Known Member

    Nov 29, 2011
    810
    224
    Yeah... Trying to find an EMI problem WITHOUT the layout and schematic is basically impossible. If you don't care to "share" your design, then good luck in your EMI mitigation task.
     
  10. kubeek

    AAC Fanatic!

    Sep 20, 2005
    4,669
    804
    Is the chassis metal and is the ground on the main board connected to the chassis, at least through some 2n2 class Y caps if you cannot go directly? Same with the rear board?
    What is the actual power supply for the 12V and 5V regulators?

    You say twisted pair wires, do they have any specific impedance, and is the second wire from the pair a ground? You´d probably want some series resistance at the transmitter, like 15-30 ohms.
    What is the data rate on those? Does the driver have extremely fast edges? And along with the data rates, can you post the printout of the measured spectrum?

    You don´t say how you get power to the rear board.

    Why are the boards so far away from each other? Would it be possible to bring them all to the back and leave LEDs or whatever necessary separately at the front?

    I´d be willing to look at it privately if you don´t mind sending whatever you can. Even just the layout of the two boards will help a lot.
     
    liquidair likes this.
  11. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    SLK001: Agreed, that's why I was wondering if anyone could give me recommendations on businesses that specialize in this.

    kubeek: Thank you so much! I may just take you up on this. Let me answer your questions:


    Is the chassis metal and is the ground on the main board connected to the chassis, at least through some 2n2 class Y caps if you cannot go directly?
    Yes, the chassis is powder-coated steel and the main board connects to it with a 16AWG wire which heads to the rear board then onto a bare stud inserted into the metal. The reason it goes to the rear board first is that there is there's a ground lift switch for the analog circuitry only and they are combined here.

    Same with the rear board?
    The rear board houses jacks for both analog and digital circuits, plus some low-speed digital circuitry. The grounds here are segmented, and ground wires bring the return currents back to the cap that supplies them...in this case the ground return for the digital section is brought back close to the large reservoir cap.

    What is the actual power supply for the 12V and 5V regulators?
    The actual power supply is a torroidal transformer supplying 12.5VAC which feeds a bridge rectifier and large reservoir cap (with small ceramics too) and then directly into the first regulator.

    You say twisted pair wires, do they have any specific impedance, and is the second wire from the pair a ground? You´d probably want some series resistance at the transmitter, like 15-30 ohms.
    The twisted pair cables are Belden 8451 22AWG with a foil shield...impedance is 45 ohm. There's 3 total in this bundle with the following configuration: Pair 1 SDA and +5V, Pair 2 is SCL and ground (standard i2c recommendation), Pair 3 is USART RX and an interupt line from an external I/O expander.

    What is the data rate on those? Does the driver have extremely fast edges? And along with the data rates, can you post the printout of the measured spectrum?
    Data rates are 100kHz i2c and 32.5 kHz for the USART. Ya, the edges from the i2c look pretty sharp on the scope from memory. Here's the measured spectrum from the first try:
    2-25-16-Plot-share.jpg
    ...and the second from my second attempt by adding ferrites right at the digital output jacks:
    4-12-16-Plot-share.jpg

    You don´t say how you get power to the rear board.
    Power to the rear board comes from the 5V reservoir cap through the twisted pair wire along with the SDA line.

    Why are the boards so far away from each other? Would it be possible to bring them all to the back and leave LEDs or whatever necessary separately at the front?
    The boards are so far apart because the majority of the circuitry is analog and I wanted to keep the clock well away from the analog circuitry. Plus, the digital section really runs the front panel switches and LEDs, so I figured this was the best spot. If I brought the uC to the rear or in the back, I'd have a ton of wires feeding the LEDs and switches, plus the clock would be closer to the analog I/O jacks.

    Thank you sooooo much! I will PM you in a few!
     
  12. kubeek

    AAC Fanatic!

    Sep 20, 2005
    4,669
    804
    Thanks for the pdf.
    Anyway, first thing I´d have a long think about is the first high peak, which looks like it´s at 40-50ish MHz, do you have the exact value in some table of peaks? Think wbout where could it come from? If it´s not a multiple of the 8Mhz cpu clock, then it could be related to the data being transmitted on the I2C bus.

    Also I am not sure where you found that way of wiring up the I2C, but I would rather go with pairs SCL+GND, SDA+GND and VCC+GND. Probably a bit of ferrite beads on the way out from the box, and a tiny bit of capacitance on the way in, like 100pf or something.
     
    Last edited: Apr 13, 2016
    liquidair likes this.
  13. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    Thank you for looking at it!
    The peaks are at 48 and 96 MHz, so it's definitely clock related, and with the cable connections being close to the crystal, I'm sure this has something to do with it.

    The SCL+GND, SDA+VCC combo was suggested in the i2c standard as the best way to make long PCB/cable runs with i2c. I did put ferrites on the MIDI jacks and I tried the bypass cap configuration shown in figure 2 of this: https://www.midi.org/images/downloads/ca33.pdf. This was the spectrum from the second attempt. It did help, so maybe some ferrites and caps like you suggested on the 3rd jack and the analog outputs may do the trick.

    For clarification, if I connected the cable shields at the main board and rear board to reduce the ground impedance of the rear board, or used the cable configuration you suggest, do I need to worry about ground loops or will it be ok since the shields/conductors will all be at roughly the same potential at each end of the cables?

    And ferrites on the analog I/O, better to put them on both signal and ground or just signal? I tried a few on the i2c and Vcc/Gnd traces that go across the board to the I/O expanders on the the left, but I had communication problems so I removed them.

    Thanks again!
     
  14. RamaD

    Active Member

    Dec 4, 2009
    254
    33
    Some parallel capacitors on Vcc and Gnd decoupling cap near the crystal, 100pF & 1nF in addition to the standard 0.1uF, as the 0.1uF SRF is around the 10MHz range.
    Also, I2C signal edges normally look sharp as they are relatively much lower frequency. Better is to measure the rise / fall times before concluding them as a source.
     
    liquidair likes this.
  15. trinalynnestar

    New Member

    Mar 9, 2016
    3
    0
    yup buddy!
     
  16. maaj

    New Member

    Apr 5, 2016
    10
    1
    I hadn't completely read the material. If crystal is problem during EMI/EMC testing. Have u isolated the GND of Oscillator/Crystal using Ferrite bead.?
     
    liquidair likes this.
  17. GopherT

    AAC Fanatic!

    Nov 23, 2012
    5,984
    3,719
    Yes, Read the initial few posts.
     
  18. liquidair

    Thread Starter Active Member

    Oct 1, 2009
    89
    5
    Thank you for the replies!

    RamaD: I will try adding some smaller caps when I get the unit back.

    maaj: Well actually no, just the Vcc node right at the power pin of the uC. GND is an island/small plane. The crystal load caps (20pF) tie to the island directly and GND pin of the uC has a short trace right to the GND node of the bypass cap and the bypass cap then grounds to the island. My thinking was that any hash generated by the crystal internally in the uC would then first circulate from bypass cap GND node to uC GND pin to crystal back into uC to clock circuitry internal to the uC to uC power circuitry to power pin to bypass cap through bypass cap back to uC GND pin...and thus not enter the island. I could likely put a ferrite on that short trace from uC GND pin to bypass cap, is that what you are suggesting?
     
Loading...