A transistor totem-pole arrangement (one NPN, one PNP per half-bridge) is commonly used, or there are dedicated H-bridge-controller ICs.What driver would you recommend?
I thought you were referring to a FET gate driver. You've got the totem-poles now, but they would normally be driving FET gates. Try re-instating the FETs. 2N3055s are not ideal for the totem poles; they have low gain.What driver would you recommend?
Dual supplies will complicate the driver requirements.Alec_t & crutschow, thanks once again. What driver would you recommend? And should I use a double supply to get ±5V?
In what way? What isn't working as you want it to? The sim worked ok for me .No lucks at all folks.
Because the time constant of R8/C4 delays the time before the U2 non-inverting input reaches a stable DC level and I wanted to speed up the sim.why did you add an offset on the ac signal/input?
Because initially the U2 non-inverting input is centred on 0V whereas the inverting input is centred on PGND, i.e. 2.27Vwhy is the signal (digital) out zer0 when I set the AC signal offset to 0
That depends on what FETs and supply voltage you will ultimately use on the output stage.what transistor (BJT) pair are you recommending?
Just an approximation to get the two U2 inputs roughly balanced initially.Why did you set it to 2.2V less than the Virtual offset (i.e. 2.27V)
That was your choice, not mine .why did you choose virtual ground to 2.27V?
In which post did I make that reference?Crutschow, I have also noted that you have recommended I download "circuit from AAC,with mods", could you kindly direct me where it's at. I have searched the forum but could not find it.......