Hi all,

I'm confused about the correlated double sampling circuit and the readout circuit located in the bottom of each column, are they the same circuit or each one separately ?

Thank's

 

What circuit???

 

It seems to me that you are doing this cmos suff as a part of some course, so why don´t you ask your tutor directly? Really this kind of advanced chip design will give you very few meaningful responses, as I don´t recall anyone in here having experience with similar stuff.
Also as MrChips says, without a schematic there is no point discussing this further.

 

1/ It's final project study and unfortunately my tutor don't know anything about it otherwise why I asked here, I know that it is strange (a tutor has a project that don't control) but the truth :/

2-the circuit is mentioned in this schematic as noise reduction circuitry

the problem is in some books or thesis, they put the noise reduction circuitry after the pixel and in the bottom of the photosensitive matrix the put a readout circuitry with the same design, Here I'm confused Is it the same circuit or there are two circuits ?

 

The top circuit you show is just a readout circuit for the pixel, not CDS.

 

This means that the readout circuit is at the level of pixel (column output) and the CDS circuit is the noise reduction circuitry.

 

This means that the readout circuit is at the level of pixel (column output) and the CDS circuit is the noise reduction circuitry.

That would be my interpretation.

 

ok thank you crutschow ^^