CCP2 capture question.

Discussion in 'Programmer's Corner' started by MaxHeadRoom, Aug 29, 2015.

  1. MaxHeadRoom

    Thread Starter Expert

    Jul 18, 2013
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    Pic18F23K22. (Assembly)
    On setting up a CCP2 capture TIM1 on interrupt, the CCP2 interrupt flag occurs OK and I see the accumulated value in TIM1 but it does not get loaded into CCPR2H/L.
    I have cleared CCPTMRS0 which according to the Man. appears to set CCP2 for TIM1?
    Anything else I might be missing?
    Debugging with Pickit3 ICD.
    Max.
     
  2. nsaspook

    AAC Fanatic!

    Aug 27, 2009
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    I see your question on the MCHP forum but I'm not an ASM guy (it's hard to follow the goto logic but it seems you are trying to measure a pulse width or something) so you should post it here. It writes on capture so if you have the interrupt the results should be in CCPR2. You have CCP2CON set to 0x05, what edge(s) do you want to capture at RC1 and what value do you read in CCPR2 at each capture?

    Wish I could help more.
    http://www.microchip.com/forums/m861014.aspx
     
  3. MaxHeadRoom

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    Jul 18, 2013
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    I can post the interrupt code but following by de-bugging with ICD I see the CCP2 interrupt pulse and the accumulated TIM1 but this accumulated value is not transferred to the CCP2 registers.
    Essentially I have an interrupt on each leading edge, the first clears the registers and prepares for the second which then (supposed to) store the accumulated value of TIM1, this seems to be working, just the TIM1-CCP2 register transfer does not occur.
    CCP2CON = 5 captures consecutive leading edges.
    Both interrupts occur OK, and the TIM1 value is correct.
    The post you link to is in C but the desired effect is similar, just that I do not want to capture a value and subtract it from the second one.
    It was suggested that I may not have TIM1 configured for the CCP2 capture, but as far as I can tell clearing CCPTMR0 selects TIM1 for CCP2?
    The CCP module for this 18F Pic is a little different to ones in the past.
    Max.
     
  4. nsaspook

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    A quick read of the chip pdf has a few point to check.
    I don't see much of interest in the errata sheet: http://ww1.microchip.com/downloads/en/DeviceDoc/80000512H.pdf
    I haven't worked with this module much either so this is for both of us.
    Timer must be in Timer or Synchronized Counter mode.
    If another capture occurs before the value in the CCPRxH:CCPRxL register pair is read, the old captured value is overwritten by the new captured value.
    Timer resource must be clocked from the instruction clock (FOSC/4) or from an external clock source.

    What value do you read in the CCPRxH:CCPRxL register pair?
     
    Last edited: Aug 29, 2015
  5. MaxHeadRoom

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    Jul 18, 2013
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    CCPR2H/L = 0x00 in both.
    TMR1 = anticipated value.


    Using 32Khz clock on TIM1.
    The captures are far enough apart that they should not be written over.
    The test was no faster than .5Ms between pulses with 20Mhz Sytem clk.
    T1CON = 0xbf

    I could just use the TMR1 values but I would like to know what is happening, also CCP should be slightly more accurate.
    Max.
     
  6. nsaspook

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    Looks like the module is getting reset somehow or the wrong location is being read. Check the define for CCPR2H/L and compare that to the special function register map.
     
  7. MaxHeadRoom

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    Jul 18, 2013
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    I will have to play around with it tomorrow now, but I will post if I find the solution.
    Going to be something stupidly simple (maybe)!
    Max.
     
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