Discussion in 'Embedded Systems and Microcontrollers' started by Â¡MR.AWESOME!, Nov 15, 2010.

1. ### Â¡MR.AWESOME! Thread Starter Member

Aug 15, 2010
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In the datasheets for PIC mcus, they have a max spec labeled "Capacitive Loading Specs On Output Pins." See page 254 of the 16f886 data sheet. I just recently got a handle on the whole $\large I=C$ $\frac{dv}{dt}$ thing. So now I'm wondering what that spec means exactly. My goal is to drive a logic level mosfet directly from the PIC with a series resistor between the PIC output and the mosfet gate to keep the current draw below 25mA. I will also have a pulldown resistor on the gate to keep the gate from floating when the circuit is unpowered. So I know I'm safe with the setup. I am just wondering what that rating means. If I were to drive a 50pF load with no series resistor and the rise time of the output pin is 2nS (p259 of the spec sheet) the current required is much higher than 25mA. So what gives?

2. ### thatoneguy AAC Fanatic!

Feb 19, 2009
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718
The limiting resistor keeps from destroying the PIC outputs from "inrush" current when charging the gate of an external MOSFET. Speed isn't hurt too badly, and the designs are more stable.

A discharged capacitor in a circuit looks similar to a short circuit at the instant voltage is applied. Charge issue with the MOSFET gate is analogous to this.

3. ### Markd77 Senior Member

Sep 7, 2009
2,803
594
The rise time on my datasheet is (oddly - must be a typo) 40ns typical, 32ns max at 5V. Does that change your calculations?

4. ### Â¡MR.AWESOME! Thread Starter Member

Aug 15, 2010
33
0
Thanks for the replies guys. I am going to take you through my thought process and show you what I understand, so bear with me through this long post.
@thatoneguy
Yes I do understand the purpose and effects of the gate resistor. What I don't understand is what the spec means. I know that I can drive a mosfet directly from the PIC safely. What do you mean by "charge issue with the mosfet gate?"

I did mean to say 40nS, I got 2nS from another spec sheet I was looking at. Now that's even more confusing. 'Cause doing the math again I get a current draw of 6.23mA, which is well under the limit of what the output pins can source.

The way I see it, the maximum capacitive load the output pin should be able to drive should be dependent on the limitation of source current available and the rise time of the output. So then the max capacitive load that can be put on a pin should be
$\frac{ 25mA \cdot 40nS}{5V} = 200 pF$
And that should change accordingly for actual rise time and voltage change.

If a discharged capacitor is subjected to a voltage change within an infinitely short period of time, it will draw an infinite amount of current, right? But, (for a change of 5V) since the amount of time it rises in is governed by the PIC (max of 40nS), and the maximum amount of current it can be given is limited to 25mA, the maximum capacitance it could do that with is 200 pF.

I get that you can drive higher capacitances, but you must limit the amount of current supplied to the load and therefore slow down the rate of voltage change. So with no resistor, 200pF should be the max, right?

I'm not trying to argue with the spec sheet. I just don't get what it means.

5. ### Markd77 Senior Member

Sep 7, 2009
2,803
594
I don't really understand it either, but here's a few thoughts.
The output drivers have a resistance - don't quote me on it but I heard it was over 20 ohms.
Maybe the 50pF maximum is actually so that it meets the rise time specification (or the other way round). With less loading maybe the rise time is less.
Unfortunately I don't have a scope to test any of this.

<ed> Just found this gem.
</ed>

Last edited: Nov 16, 2010
6. ### Â¡MR.AWESOME! Thread Starter Member

Aug 15, 2010
33
0
I have a scope. Any ideas on how to test your theory?

7. ### Â¡MR.AWESOME! Thread Starter Member

Aug 15, 2010
33
0
Perhaps that rating has to do with the minimum rise time. Doing the math, I get a rise time of 10nS which isn't unreasonable.