Building a simple LDO using discrete components

Discussion in 'The Projects Forum' started by newbie217, Oct 30, 2011.

  1. newbie217

    Thread Starter Active Member

    Apr 12, 2009
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    I am attempting to design a simple LDO using discrete components to better understand, analyze the workings of the feedback loop. I have no prior experience in doing this so am currently picking 'random' parts to use as the pass transistor, error amplifier. I'm thinking about using a 1.2 V bandgap voltage reference circuit for the reference, but currently just have a 1.2 V voltage source connected to it.

    For this project, I don't have any specific requirements (other than for it to work and not oscillate :rolleyes:). For now I have 5 V at the input, and matched resistive divider to give me 2.4 V at the output. I simulated it, and it looks ok w/ no load or only a resistive load attached to it.

    I am running into issues (oscillations) when I attempt to do a load step. I've tried varying the rise / fall times of the load, magnitude, etc, but it seems no matter what, the system oscillates.

    Any suggestions on what may be causing this? Also, what discrete op-amp is a good recommendation for use as an error amp? Pass transistor? I only need to step from 0 to 1 A (at most). Again, no real specific requirements. Just want the thing to work! :eek:
     
  2. k7elp60

    Senior Member

    Nov 4, 2008
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    I don't see any need for the 2N2222 transistor. I didnot check the specifications on the MOSFET, but I hope it will turn on with a gate voltage of approximately 2.4V.
     
  3. newbie217

    Thread Starter Active Member

    Apr 12, 2009
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    Don't I need to invert the signal since the MOSFET is PMOS? That is, if the output load increases, output voltage decreases, error amp output increases, and the gate drive signal should go more negative to increase VGS of pass transistor to deliver more current to bring the output back up.
     
  4. SgtWookie

    Expert

    Jul 17, 2007
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    Here, try it like this instead.

    I changed MOSFETs for one that has a much lower threshold. I changed the feedback, replaced the opamp, changed the NPN to PNP, moved the emitter resistor to the base, decreased the gate pull-up resistor, incorporated your R4 into C2, etc.

    Try experimenting from this point.
     
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  5. bountyhunter

    Well-Known Member

    Sep 7, 2009
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    Any LDO will require compensation. You need a bulk output cap to reduce bandwidth and that cap requires a specific ESR value to create a zero for compensation. You also need dominant pole compensation on the op-amp gain block (cap from output back to the inverting input). Select the C value to set that pole at about 500 - 1kHz.

    You might want to read this article. All of your questions about compensating an LDO for stability are answered in it.

    http://www.national.com/an/AN/AN-1148.pdf


    Allow me a dumb question: have you actually built up a circuit or are you just running simulations?
     
    Last edited: Oct 30, 2011
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  6. newbie217

    Thread Starter Active Member

    Apr 12, 2009
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    Thanks Sgt, you make it look so easy... while I'm here struggling just trying to get the thing to simulate :rolleyes:

    Btw, how did you just instinctively know that the 1097 would cure all the oscillation problems? For this type of application, what are the main criteria needed for the op-amp? I tried running your simulation and it works as expected, but as soon as I plugged in the 6244, it oscillated again... things like this are constantly putting a monkey wrench into my designs b/c it makes me second guess everything I'm doing... sigh...

    Bountyhunter, thanks for the compensation article. I'll read up on that as well.

    Since the stability issue is ultimately tied to poles and zeros, it would make sense to look at the Bode plot of this, correct? I've seen techniques where you inject an AC signal superimposed on VREF and 'break' the feedback loop by inserting a large inductor in series @ FB node to the other op-amp input so it blocks the AC. There is also a large capacitor to GND at the FB node for AC signals. Is this the correct way to do it? I've tried it by using 1 GH inductor and 1 GF capacitor, but noticed the Gain and Phase plots varied significantly depending on the size of the inductor / capacitors. I thought by making them really big, they would be basically zero impedance or infinite impedance...

    Can anyone provide the 'correct' method for looking at the stability gain and phase plots?


    THanks!
     
  7. bountyhunter

    Well-Known Member

    Sep 7, 2009
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    Here covered:

    http://www.national.com/an/AN/AN-1643.pdf


    It also tells EXACTLY how to optimize LDO compensation.
     
  8. crutschow

    Expert

    Mar 14, 2008
    13,039
    3,243
    Why do you need Q1 and R1 in that circuit? It would seem the op amp could drive M1's gate directly.
     
  9. Ron H

    AAC Fanatic!

    Apr 14, 2005
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    The PNP is needed as a level shifter to get the op amp's output within the linear range.
    I should point out that the input common mode voltage is a little outside the guaranteed range of the LT1097. LT1097 is pretty restricted with a single 5V supply.
     
  10. SgtWookie

    Expert

    Jul 17, 2007
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    I'd actually started out replacing the opamp with an LMC6482, which is RRIO (Rail to Rail Inputs and Outputs) - but I was in a hurry and didn't have the time to root around for the library model, .asy, and taking the time explaining how to hook everything up.

    The LMC6482 doesn't need the PNP nor the 1k resistor. Admittedly, I just "shotgunned" a few different LT opamps in there until I got one to work so he'd have one already in his library to experiment with; I couldn't remember a Linear Tech RRIO voltage feedback opamp that was in the library offhand. There's bound to be a better-matched LT model in the library that will work.
     
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