I have to create the circuit for this function: A+(BC)'+(CD)'=Z, using NAND gates.
After asking some friends about how to do this, and searching in the forums, I been using this method:
Z= A + (BC)' + (CD)'
Z= [A+(BC)'+(CD)']''
Using De Morgan's...
Z=[A'.(BC)''.(CD)'']'
Then finally...
Z=[A'.(BC).(CD)]'
And I don't know what to do from now on, since (B.C) are AND, not NAND, what am I missing?
After asking some friends about how to do this, and searching in the forums, I been using this method:
So I got this:Please note [' = NOT] and I am not simplifying the expression in the following:
AB+DA+CA+DCB
Double NOT the expression (because double NOT does not alter the expression):
(AB+DA+CA+DCB)''
Using DeMorgans (A+B)' = A'.B'
Therefore:
((A.B)'.(D.A)'.(CA)'.(DCB)')'
Which can be implemented using purely NAND gates.
You may be advised to look at simplifying the expression, although that depends on what your assignment requires.
Dave
Z= A + (BC)' + (CD)'
Z= [A+(BC)'+(CD)']''
Using De Morgan's...
Z=[A'.(BC)''.(CD)'']'
Then finally...
Z=[A'.(BC).(CD)]'
And I don't know what to do from now on, since (B.C) are AND, not NAND, what am I missing?