Boolean expression

Discussion in 'Homework Help' started by thisonedude, Jun 29, 2014.

  1. thisonedude

    Thread Starter Member

    Apr 20, 2014
    52
    0
    Hi all.

    I was wondering if i could get some help in implementing my equations into shematics. So my bojective is to use 3-input NAND gates, 2-input NAND gates, and inverters. this design will be based on the minimum SOP equations.

    My truth table was this:

    INPUT OUTPUT
    S2 S1 S0 | X0 X1 X5 X6
    0 0 0 1 0 0 0
    0 0 1 0 0 1 0
    0 1 0 0 0 0 1
    0 1 1 0 1 0 0
    1 0 0 0 1 1 1
    1 0 1 1 1 0 1
    1 1 0 1 1 1 0
    1 1 1 1 0 1 1

    For SOP, my equations (Simplified) are:
    X0 = S2'^S1'^S0' + S2^S1 + S2^S0
    X1 = S2'^S1'^S0 + S2^S0' + S2^S1'
    X5 = S2'^S1'^S0 + S2^S1 + S2^S0'
    X6 = S2'^S1^S0 + S2^S0 + S2^S1'

    I'm having a hard time designing the schematic. So far all i have is three inputs each separately being inverted and then they combing going into a NAND gate. Can anyone help me from here?
     
  2. MrCarlos

    Active Member

    Jan 2, 2010
    400
    134
    Hello thisonedude

    Let me give you a little push.

    You have to make 3 horizontal lines naming them: S0, S1 and S2.
    Below these, 3 NOT gates, naming the other 3 lines As: S0', S1' and S2'

    Analyzes the image below to have a better idea.
     
  3. thisonedude

    Thread Starter Member

    Apr 20, 2014
    52
    0
    That was how i originally thought about doing it. But the constraints are that we are only allowed to use 3-input NANDS, 2-input NANDS, and inverters.

    I came out with the following. Would you mind checking my work? This is for the function X0 only. I used the DeMorgans Theorem to use the NANDS instead or the OR.
     
  4. MrCarlos

    Active Member

    Jan 2, 2010
    400
    134
    Hello thisonedude

    You say:
    Would you mind checking my work?

    Well, I'd like to see it to check it
     
  5. thisonedude

    Thread Starter Member

    Apr 20, 2014
    52
    0
    My schematic is attached attached to my reply post. Is it not showing up?
     
  6. thisonedude

    Thread Starter Member

    Apr 20, 2014
    52
    0
    I have reattached the image.
     
  7. MrCarlos

    Active Member

    Jan 2, 2010
    400
    134
    Hello thisonedude

    What if you remove the red NOT gates and you add the blue wire ?

    But I do not know if your circuit meets your formulates
    You tried it ?
     
    thisonedude likes this.
  8. thisonedude

    Thread Starter Member

    Apr 20, 2014
    52
    0
    Hi MrCarlos,
    Thank you for your help. I was able to figure out the schematic. my problem was that i had those extra NOT gates (The red ones) and i also have three extra NOT gates that i did not need to have. Thank you again for your help!
     
  9. MrCarlos

    Active Member

    Jan 2, 2010
    400
    134
    Hello thisonedude

    You say:
    Thank you for your help. I was able to figure out the schematic.
    Probably your schematic is similar to mine.

    Let me see, if possible.
    It could serve as a sample for other members.

    Meanwhile, I'll make a recommendation.
    There is a computer program named Boole-Deusto. Search it on google.com.
    Is NOT the eighth wonder but I have been very useful to learn.

    The point that it is not designed to handle many variables either input or output.
    I'm not selling it but I'm recommending it as a very good programming tool to develop combinational circuits, decoders, and so on.

    Anyway, with this Software (Boole-Deusto) you can develop your design with only gates
    NAND,
    NOR,
    AND & OR.

    With it, I developed you did with only NAND gates.
    All material is attached.
    Take a look.

    Please, be sure to not let us see your design.
     
    absf likes this.
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