# Beginners digital logic help

Discussion in 'Homework Help' started by golden3159, Sep 28, 2009.

1. ### golden3159 Thread Starter New Member

Sep 28, 2009
1
0
This problem is driving me crazy. I have to build a circuit.

It has 4 inputs and the formula is F(A,B,C,D) = Ʃ(0,1,3,4,8,9,15).
The problem is, I can only use the following gate which has 3 control lines , and only 8 inputs. This is the chip I am given to use:

Here is my truth table.

The only way I can see this working is to group the table into 2's (as I have done in the table). My professor has told me that I am on the right track and he can't help me anymore because I practically have the answer. The problem is, I have no clue how to actually implement this. I have a lingering voice in my mind telling me it can be done with a NOT gate, but I am unable to put the pieces together. Am I on the right track with the truth table and idea?

Thanks!

2. ### Ratch New Member

Mar 20, 2007
1,068
4
golden3159,

Sorta. Your professor is lazy, because he took this problem directly out of Digital Design by M. Morris Mano, second edition, p. 179 .

That chip is a 8X1 multiplexer or MUX. You can still get a output for 2^n+1 states even though it only has n selection lines. First of all, notice that the chip is bass-ackwards, because the C-select line is the most significant. So your problem should be to implement F(D,C,B,A) = Ʃ(0,1,3,4,8,9,15).

Data line D7 will correspond to the most significant logic variable D. So first connect C,B,A to their respective select lines. Now we connect each data line to either 1,0,D, or D'. We should make a implementation table like Mano does, but I will try to describe it to you.

Connect a 1 to D0, because both state 0 and 8 cause either D or D' to be applied to D0 when selected. (X+X')=1, right?

Connect a 1 to D1, because both state 1 and 9 cause either D or D' to be applied to D1.

Connect D' to D3 and D4, because both state 3 and 4 require D' when selected.

Connect D to D7, because state 15 requires D when selected.

Connect 0 to D2,D5,and D6 because states 2,5,6,10,13, and 14 all require both D and D' to be 0 at all times when selected.

I hope that explains it.

Ratch