Hi
I need some help with my course work please.
I have to design and simulate in Multisim a combinational logic circuit using SSI which takes a BCD input and produces the codes to drive a seven segment common anode display.
The final design must be implemented with NAND gates only.
I have done all Karnaugh maps and DeMorgan's Theorem.
The results are:
a=A'B'C'D' * A'B'CD'
b=A'BC *AB'C
c=A'BC'
d=AB'C'D' *A'B'C *ABC
and so on....
My initial deign on the screenshot attached.
The question i have got is how do i connect NAND gates.
If lets say i want to connect a section (a) of the display i need 2 four inputs
and 1 two inputs NAND gates is it correct??
And what next?
To get the first A' do i connect a U7A gate to the GND or to the inverter,
the same about the second A' do i connect U8A to the GND or to the inverter?? And so on..
Any help would be appreciated.
Thanks.

 

Well, think about it. If you connect an input to ground and that input is supposed to be A', how will the state of A have any effect since a grounded input is always LO?

In general, you are going to need both the straight and the complemented versions of each input (so, A and A' as well as B and B' and so on). Get all eight signals available and then just wire up the ones you need for a particular segment.

 

You should write down the truth table from BCD(ABCD) input to seven segments( abcdefg), and start to connecting the wire from BCD 0~9(0000H~1001H) to 7-Seg(abcdef~abcdfg) [a=0,b=0,c=0,d=0,e=0,f=0 ~ a=0,b=0,c=0,d=0,f=0,g=0]

 

Thanks for your help, i got it working!