Basics of Transistors

Discussion in 'Homework Help' started by jason_bourne, May 4, 2010.

  1. jason_bourne

    Thread Starter New Member

    May 4, 2010
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    Hi,
    We just finished covering transistors, i am unsure about how the equations that we use to work out IB, VE etc are derived. Mostly it's KVL but i can't get my head around how it has been done. I am putting up some typical circuits that we are meant to know at our level. It'll be helpful if someone can redraw the diagram with the V sources included. I get more confused when there is dual power supply.

    Thanks

    I have attached the images along with this post
    Q1 (IMG 001)
    for this one how would i find IB?
    i don't understand how VCC and VEE are part of the KVL loop and what signs they would have? Also why don't we include RCIC and VC whilst doing KVL?

    Q2 (IMG 007)
    For this one why do we include REIE in the KVL, i thought the closed loop was just the IBRB. Also how would you find VE firstly? Now say there is RC as well then what? Would you go -VEE - VCC + ICRC + VC + IERE + VE = 0? Why do we treat that as a seperate loop?

    Q3 (IMG 0022)
    Again how would we do include VEE and VCC? Like i were to join this up with sources would the - end of source be connected to ground is that why the bottom point is -VEE? Does the left hand of the circuit join up to loop for IB is that why we include REIE?

    Q4 (IMG 003)
    For this one i know you do Thevenin, i want to know why is VTH the v drop across R2. NOTE VEE=-VCC. So again how would you do the KVL and this time i know when doing VTH it's VCC-VEE but the lecturer said you add VEE as well why?


    Any help is appreciated
     
  2. PRS

    Well-Known Member

    Aug 24, 2008
    989
    35
    These are all examples of how to bias an NPN transistor for its required dc voltages and currents.

    In the first example Ib = (Vcc-Vbe -Vee)/Rb where Vee is negative. Follow that path with your eyes; you should see it encircles the ground. To simplify this, two negatives make a positive so we could write Ib = (Vcc + |Vee| - Vbe)/Rb. Vcc and Vee are given variables but Vce for silicon is .6V (some instructors say .7) and for germanium is .2V.

    Just follow a closed path using KVL. I'll help with the others, but I'd like to see your effort at the second problem first. But here's a hint for the second. Make the path be from Vcc all the way around to ground. And be sure to include the voltage drop between the base and the emitter of the transistor.
     
    Last edited: May 4, 2010
  3. jason_bourne

    Thread Starter New Member

    May 4, 2010
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    Hey, thanks for the reply.
    I have done all the questions but it's just i don't understand why are the equations that way. I input loop equation just clicked, i wasn't going to ground to for my equations. So for second one i'd do it like this
    -VCC + iBRB + VBE + iERE -VEE = 0
    rearrange for iB and iE = (Beta + 1)RE
    iB = VCC + VEE - VBE/(RB + (B+1)RE)

    VE is the one i m bit confused about if i did KVL i'd do the whole loop so from -VCC back to ground but i was told that VE already includes VCE,VC in it or something like that, what i thus did was:
    -VEE + VE + iERE = 0
    but ans is -VEE -VE + iERE = 0 not sure why but i think it's gotta to do with the fact that the top end of RE is +. So i basically want reasoning of what it works that way, i will have a go at other questions as well and someone can check if my reasoning for it is correct

    Thanks again
     
  4. PRS

    Well-Known Member

    Aug 24, 2008
    989
    35
    You got the right answer, but you need to put a bracket around the term

    Ib = (Vcc+Vee-Vbe)/[Rb-(Beta+1)Re]

    Your equation -Vee + Ve + IeRe = 0 is not a closed path. It's meaningless. To make a path like that you need to follow the path all away round to ground. This would include Vbe, IbRe and Vcc and you'd get the same equation. The only difference is that you are following the path in the opposite direction from the first path.

    The proper KVL path which includes the base current should follow from one voltage source all the way back to ground. I would write the initial equation by following the loop:

    Vcc - IbRb - Vbe - IeRe - (-Vee) = 0

    And, as you properly recognized, you make use of the relationship Ie = Re(Beta+1)
     
    Last edited: May 5, 2010
  5. jason_bourne

    Thread Starter New Member

    May 4, 2010
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    0
    Hey,

    So how would i find VE?
    Next question that i want to look at is the last one. I understand that you'd use Thevenin to simply the circuit. How would we do the VTH though?

    Cheers
     
  6. t_n_k

    AAC Fanatic!

    Mar 6, 2009
    5,448
    782
    R1 & R2 form a voltage divider off Vcc. The divider output voltage is Vth.
     
  7. PRS

    Well-Known Member

    Aug 24, 2008
    989
    35
    Ve = Vb - Vce

    I redrew the circuit using thevenin's theorem in order to create a loop to ground. Note that Rb is R1 in parallel with R2
     
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  8. jason_bourne

    Thread Starter New Member

    May 4, 2010
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    Hi Paul,

    Most of the questions we do for DC analysis require us to find VCE, i agree with your equation but what i tend to do is try to find VC and VE separately and then go VCE = VC-VE. In order to find these two quantities our lecturer said that VC = VCC - IcRC (where IC is BiB). It's the VE that i was confused about when there is dual supply. If there is RE then VE is just iERE (without dual supply) if there are dual supplies then what? Like you said i tried tracing out the loops for VC = VCC -iCRC what i didn't understand is why don't you include iERE in there if there is RE? and the second supply if there is one.

    For the Thevenin, shouldn't there be VTH in the equation you had? So VTH should be:
    R2/R1+R2 (VCC-VEE) but the answer says it's (VCC-VEE) + VEE.

    Thanks again
     
  9. PRS

    Well-Known Member

    Aug 24, 2008
    989
    35
    I'm sorry about this, Jason, but I wrote Vce when I meant Vbe in the equation

    Ve = Vb - Vbe

    For the dual supply:

    You're right Vc = Vcc - RcIc [eq 1]

    But to get a meaningful equation for Vce use this for Ve

    Ve = -Vee + IeRe (or Ve = IeRe - Vee) [eq 2]

    Then Vce = eq1 - eq2

    And, as you already know, pick the current you want to include in the equation and convert the other via its beta relationship.

    As for the loop I showed in my drawing, it is correct. It comes straight from my old textbook. The idea behind the loop is that it goes around in a closed path to ground. As you can see, Vcc is not in that path.

    I included another attachment. This is for a different circuit, but it simplifies the point I'm trying to make about closed paths. The point being that it is not always necessary to draw a circular loop. The main thing is that it be a closed path. They come out the same but sometimes it's more practicle to draw a linear path as in circuit 2. I redrew it as circuit 3 to show it comes out the same.
     
    Last edited: May 7, 2010
  10. jason_bourne

    Thread Starter New Member

    May 4, 2010
    7
    0
    Thanks Paul i understand the material much better. We just finished small signal analysis and i am unsure about some of the questions posed. I am attaching the circuit in this post.

    I have done the DC analysis and checked my answers they are all correct.
    The Beta we took was 400 which gave iB as 2.27uA, iC = 0.89mA iE = 0.893mA VC = 6.091V VB = 2.664

    First we apply a 2 volt peak to peak input ans we were required to sketch input and output. The input is just a sine wave with amp 2 period 1ms.
    The output went from about 6 to -6 with clipping. Why is that?


    Ok they said, assume input voltage is 4 volts peak to peak. The gain of this circuit is 4.5 (R4/R3) thus the output should be 18 volts peak to peak. But if you do this on the oscilloscope it shows significant clipping. So why can't it be 18 volts?

    So the Q point can't exceed VCC (15) but our lab tech said things relating to saturation and what not confusing me further so i want to know what's really going on?

    After this, it says we change the input voltage to 2V peak to peak. Thus the output voltage is +4.5 to -4.5, so consider the Q point (VC from DC calculation) do you think +4.5 and and -4.5 are possible and does a graph support your ans?

    i said it should swing around the DC offset (or should i say bias cause that's what we have done haven't we?) of VC (about 6 volts). so after that you add the 2 and -2 so it's 8 to 4 this is within range of 15 to -15 so it should fit but the graph shows the -4.5 getting clipped. Again the tech said something like iB and iC will try to increase but can't as VCE = 0.2 then it will stop amplifying (i agree with stop amplifying cause it won't be in active region any more that's why we have VBE)

    So what's really going on?


    Thanks
     
  11. PRS

    Well-Known Member

    Aug 24, 2008
    989
    35
    Good morning, Jason. I did a 1st order analysis of your circuit and included it in the attachement. The reason for a low order analysis is that I actually breadboarded the circuit using a 2N3904 transistor. Since actual Beta values vary and the resistors are 10% there is no point in using higher order equations. Notice I started off with a voltage divider at the base. This ignores the current going into the base, but this was justified by the high input resistance of this particular amplifier.

    As for the clipping, you only have +15 volts available from a positive supply, and no negative voltage available at all. The upper going sine wave can't go beyond the 15 volt barrier and the negetive going part of the wave can be no lower than the lowest voltage available. When they exceed the limits the signal is said to be saturated, and another more descriptive word is 'clipped'. With a guitar amplifier, this clipped waveform is used to create a fuzz box, also called overdriving the amplifier.

    I think I've answered all of your questions. If not, let me know. I'm glad to help. :)
     
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