Basic Verilog Testbench Help

Discussion in 'Homework Help' started by lllaurenlll, Nov 28, 2015.

  1. lllaurenlll

    Thread Starter New Member

    Nov 28, 2015
    2
    0
    I am writing a code to tell if a year is a leap year or not, however I'm having some trouble getting my testbenches to work correctly. I'm not sure what needs to be changed/fixed. Any help pointing the way would be greatly appreciated.

    Code (Verilog):
    1.  
    2. module DivisibleByFour(OUT, YM, YH, YT, YO); //divisible by 4
    3. input [3:0]  YM,YH, YT, YO;
    4.    //w =3 x=2, y=1, z=0
    5.  
    6.  
    7. output OUT;
    8.  
    9. assign #10 OUT =  (~YT[0]&((~YO[3]&~YO[2]&~YO[1]&~YO[0])|(~YO[3]&YO[2]&~YO[1]&~YO[0]) //evens
    10.   |(YO[3]&~YO[2]&~YO[1]&~YO[0])))
    11.   |(YT[0]&((~YO[3]&~YO[2]&YO[1]&~YO[0])  //odds
    12.   |(~YO[3]&YO[2]&YO[1]&~YO[0])));  
    13.  
    14. endmodule
    15.  
    16.  
    17. TESTBENCH FOR DIVISIBLE BY FOUR
    18.  
    19. module DivByFourtb ( );
    20.  
    21. reg [ 3:0] YM, YH, YT, YO;
    22. wire OUT;
    23.  
    24.  
    25. DivisibleByFour  four(OUT,YM, YH, YT, YO);
    26.  
    27. initial
    28.    begin
    29.   #100 YM= 4'b0000;
    30.   #100 YH= 4'b0000;
    31.   #100 YT= 4'b0000;
    32. #100 YO= 4'b0000;
    33.  
    34.  
    35.  
    36. #100 YT= 4'b0001;
    37. #100 YO= 4'b0001;
    38.  
    39. #100 YT= 4'b0010;
    40. #100 YO= 4'b0010;
    41.  
    42. #100 YT=  4'b0011;
    43. #100 YO=  4'b0011;
    44.  
    45.  
    46. #100 YT=  4'b0100;
    47. #100 YO=  4'b0100;
    48.  
    49. #100 YT=  4'b0101;
    50. #100 YO=  4'b0101;
    51. #100 YT=  4'b0110;
    52. #100 YO=  4'b0110;
    53.  
    54. #100 YT=  4'b0111;
    55. #100 YO=  4'b0111;
    56.  
    57. #100 YT=  4'b1000;
    58. #100 YO=  4'b1000;
    59.  
    60. #100 YT=  4'b1001;
    61. #100 YO=  4'b1001;
    62.  
    63. #100 YT=  4'b1010;
    64. #100 YO=  4'b1010;
    65.  
    66. #100 YT=  4'b1011;
    67. #100 YO=  4'b1011;
    68.  
    69.  
    70. #20 $finish();
    71. end
    72. endmodule
    73.  
    74.  
    75. DIVISIBLE BY ZERO
    76.  
    77. module IsZero(A, B, C, D, YM, YH, YT, YO); //isZero
    78. input [3:0] YM, YH, YT, YO;
    79.  
    80. output A, B, C, D;
    81. assign #10 A = ~YO[3]&~YO[2]&~YO[1]&~YO[0];
    82. assign #10 B = ~YT[3]&~YT[2]&~YT[1]&~YT[0];
    83. assign #10 C = ~YH[3]&~YH[2]&~YH[1]&~YH[0];
    84. assign #10 D = ~YM[3]&~YM[2]&~YM[1]&~YM[0];
    85.  
    86. endmodule
    87.  
    88.  
    89. DIVISIBLE BY ZERO TESTBENCH
    90.  
    91. module IsZerotb ( );
    92.  
    93. reg [ 3:0] YM, YH, YT, YO;
    94. wire LEAVE;
    95.  
    96. DivisibleByZero mer(LEAVE,YM, YH, YT, YO);
    97.  
    98. initial
    99.    begin
    100.   #100 YM= 4'b0000;
    101.   #100 YH= 4'b0000;
    102.   #100 YT= 4'b0000;
    103. #100 YO= 4'b0000;
    104.  
    105.   #100 YM= 4'b0001;
    106.   #100 YH= 4'b0001;
    107.   #100 YT= 4'b0001;
    108. #100 YO= 4'b0001;
    109.   #100 YM= 4'b0010;
    110.   #100 YH= 4'b0010;
    111.   #100 YT= 4'b0010;
    112. #100 YO= 4'b0010;
    113.   #100 YM= 4'b0011;
    114.   #100 YH= 4'b0011;
    115.   #100 YT= 4'b0011;
    116. #100 YO= 4'b0011;
    117.  
    118. #100 YM= 4'b0100;
    119.   #100 YH= 4'b0100;
    120.   #100 YT= 4'b0100;
    121. #100 YO= 4'b0100;
    122.   #100 YM= 4'b0101;
    123.   #100 YH= 4'b0101;
    124.   #100 YT= 4'b0101;
    125. #100 YO= 4'b0101;
    126.   #100 YM= 4'b0110;
    127.   #100 YH= 4'b0110;
    128.   #100 YT= 4'b0110;
    129. #100 YO= 4'b0110;
    130. #100 YM= 4'b0111;
    131.   #100 YH= 4'b0111;
    132.   #100 YT= 4'b0111;
    133. #100 YO= 4'b0111;
    134. #100 YM= 4'b1000;
    135.   #100 YH= 4'b1000;
    136.   #100 YT= 4'b1000;
    137. #100 YO= 4'b1000;
    138. #100 YM= 4'b1001;
    139.   #100 YH= 4'b1001;
    140.   #100 YT= 4'b1001;
    141. #100 YO= 4'b1001;
    142. #100 YM= 4'b1010;
    143.   #100 YH= 4'b1010;
    144.   #100 YT= 4'b1010;
    145. #100 YO= 4'b1010;
    146. #100 YM= 4'b1011;
    147.   #100 YH= 4'b1011;
    148.   #100 YT= 4'b1011;
    149. #100 YO= 4'b1011;
    150.  
    151. #20 $finish();
    152. end
    153. endmodule
    154.  
    Used code tags for verilog
     
    Last edited by a moderator: Nov 28, 2015
  2. WBahn

    Moderator

    Mar 31, 2012
    17,743
    4,792
    Are we supposed to just magically know what OUT, YM, YH, YT, and YO are?

    Are we supposed to just magically know what you mean when you talk about "divisible by 0"?

    The onus is on YOU to communicate your problem and your approach clearly and unambiguously.
     
  3. lllaurenlll

    Thread Starter New Member

    Nov 28, 2015
    2
    0
    So, YM= y millennia (thousands), YH= hundreds place, YT=tens place and YO= ones place. OUT is just the name of the wire/output. The first module is finding whether the last two digits are divisible by 4 and the second is divisible by zero, ie if the year divides by 100. A year is defined as a leap year when it is divisible by four, unless it is divisible by 100 and not 400. I did not post the code for finding when a year divides by 400. If the 10s digit is even, the digit in the ones place will be 0, 4, 8. If it is odd, the ones digit will be 2 or 6.
     
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