# Basic Logic Gate question

Discussion in 'Homework Help' started by greentea, Jan 28, 2011.

1. ### greentea Thread Starter New Member

Jan 28, 2011
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I'm taking an intro to nano-technology course and my instructor gave us a list of questions to answer. Basically he wants us to go on the internet and look up terms and processes. I'm stuck on the last question. I've been looking around the last hour for just a basic idea or hint of an idea.

The question is, In reference to logic gates, what is a complementary inverter? What does it do?

Now with the research I've done today I have some very basic understanding of what a logic gate is. Complementary inverter I cant find anything simple enough about them that I can understand. If anyone could just give me the most basic idea or a hint of where I can look to find some information on what a complementary inverter is I would be greatly appreciate that.

Apr 20, 2004
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3. ### greentea Thread Starter New Member

Jan 28, 2011
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Thank you for that link. So basically another name for a complementary inverter is complementary gate? If thats the case, then my question is answered.(I think) The key issue is I have no background information in circuits or electronics at all. The teacher has not even spoken about the concepts in these questions, just e-mailed them to use this afternoon after class.

Nano-technology deals a lot with MEM's and NEM's so I'm nearly 100% sure this question has to do with complementary gates helping when there is a lack of physical space.(I think?)

Again I appreciate all the help and patience with my lack of knowledge on circuits.

4. ### Georacer Moderator

Nov 25, 2009
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In general, complementary design in VLSI is a technique where you use two networks to implement a logic function. A Pull-Up Network to give the Vcc signal to the output when needed, and a Pull-Down Network to let the Ground through to the output. These two networks work complementarily, only one of them being active at any time.
The PUN is comprised only by PMOS transistors and the PDN by NMOS.

For an inverter, the PUN is one single PMOS and the PDN a signle NMOS.

5. ### beenthere Retired Moderator

Apr 20, 2004
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I would think that -
- we may assume complimentary outputs, like ECL100 logic gates.

6. ### Papabravo Expert

Feb 24, 2006
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I see a dangerous level of ambiguity here. While the other answers given are plausible and correct, the precise term "complementary inverter" is problematical. In strict terms the inverter has one input and one output. You could say that the "output is the complement of the input". In logic design the word complement means "opposite".

With only two logic values, zero and one, the complement of zero is one and the complement of one is zero. My interpretation is that the term "complementary inverter" was invented by the department of redundancy department. In common usage we would shorten it to just "inverter".

I would be interested in knowing the outcome. Please come back and tell us what your teacher's interpretation is -- I'm dying to find out.

7. ### Georacer Moderator

Nov 25, 2009
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I 'll explain my approach with some multimedia:

To my understanding this isn't a complementary inverter:

whilst this is:

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8. ### Papabravo Expert

Feb 24, 2006
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OK. If you're a silicon designer I'll buy that explanation. I guess that is what MEMS is all about. It is an unlikely thing to do with discrete parts but I'll still be interested in hearing the outcome.

9. ### greentea Thread Starter New Member

Jan 28, 2011
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Thanks for all the responses guys, I really appreciate it. The more I look into this and ask around the more curious I am about what my professor expects as an answer. He has a phd is materials science so I'd be willing to bet he worded the question incorrectly as I don't believe circuitry is his forte. He just wants us to have some basic terminology down before the 2nd portion of the class, which focus's mostly on MEMs, NEMs and silicon wafer manufacturing.

I'll be sure to share what his interpretation of a complementary inverter is.

10. ### beenthere Retired Moderator

Apr 20, 2004
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Thanks, we are curious about that.

11. ### Papabravo Expert

Feb 24, 2006
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I would advise keeping an open mind until the instructor reveals his meaning. Don't judge him too harshly since you may have learned more from the path taken to the answer than just having it spoon fed to you. Please come back and tell us what he meant -- PLEASE!

12. ### greentea Thread Starter New Member

Jan 28, 2011
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I am keeping an open mind, I'm just trying to figure this puzzle out. I was lightly suggesting he may of mixed up the terminology, not saying it was 100% the case. I am not educated in this subject, so for all I know the wording of the question is perfectly sound.

I know I've learned much more looking into this and asking around then I would of if my teacher just gave me a simple explanation.

Again, I really appreciate you guys taking time and trying to help

I'll know Tuesday what he exactly meant and will be sure to let you all know.

13. ### greentea Thread Starter New Member

Jan 28, 2011
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quote from my teacher "...two field affect transistors, p type and t type....if input is high, output is low..." A question was raised, "So, 1=0 and 0=1?" his answer was yes.

Apparently he read a paper that spoke of complementary inverters 5+ years ago and thought it might be worth us knowing what one was.

14. ### Papabravo Expert

Feb 24, 2006
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So Georacer had the right interpretation. Give the man a big Cee-gar. Well done sir.

15. ### Georacer Moderator

Nov 25, 2009
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Thank you! Thank you all!
But I wouldn't be here right now without the help of my coworkers, friends and familly.
So I would like to thank...
<Pulls a 5-meter list from pocket>