I think the switches are tacticle so they shouldn't have too much bounce.

On what do you base this claim? Why wouldn't tactile switches exhibit switch bounce? And ANY bounce is too much bounce when dealing with a edge-sensitive circuit.

Is it easy to eliminate switch bounce?

It's easiest to do if you use SPDT switches. Then you can just use an RS latch made using two NAND gates (so a single quad NAND gate part can debounce two switches). With a SPST switch it is a bit harder, but often using a suitably-sized RC low-pass filter will do the trick. In this application you have the advantage of not being too sensitive to missing an initial pulse and can accept that possibility as the price to ensuring that you don't get spurious pulses.

 

My design may be strange...but Hey it works...hopefully. The enable is the same ad the clock except it counts on the down slope instead of the up.

That's not what the first reference I pulled up said, but upon looking up the actual data sheet, I see what you mean. Whoever chose that name for that pin should have been shot slowly as a small child!

Since it is an edge-sensitive signal, you have committed a pretty serious crime in designing a circuit with a gated clock. Circuits with gated clocks are very susceptible to logic hazards and race conditions and it take a significant amount of analysis to prove that you have no critical races or hazards. Using gated clocks isn't, itself, a crime; but doing so without performing the requisite analysis is (or at least should be).

 

Oh, forgot to point out that one of the standard ways to debounce a circuit is to double register it with a clock signal that is longer than the bounce period. You can use an output from your clock divider as your debounce clock.

 

So I believe the pull down resistor will work... But I can no longer get the 1Hz time base. My immediate instinct was a shorted something while soldering the pull down resistors but I checked that with no results. There is 16K of resistence between VDD and GND. Which doesnt seem right.

It was working. Maybe I fried a IC somehow?

 

That's not what the first reference I pulled up said, but upon looking up the actual data sheet, I see what you mean. Whoever chose that name for that pin should have been shot slowly as a small child!

Since it is an edge-sensitive signal, you have committed a pretty serious crime in designing a circuit with a gated clock. Circuits with gated clocks are very susceptible to logic hazards and race conditions and it take a significant amount of analysis to prove that you have no critical races or hazards. Using gated clocks isn't, itself, a crime; but doing so without performing the requisite analysis is (or at least should be).

I don't follow. What do you mean by critical races or hazards?

 

Consider the following logic:

Y = A' + AB

This might be implemented as:

C = A'
D = AB
Y = C + D

So imagine that you have A=0, B=1. The output should be Y=1.

Then A changes from A=0 to A=1. The output should still be Y=1.

But now let's walk through what might actually happen.

Before the change, all of the signals are:

A = 0
B = 1
C = 1
D = 0
E = 1

Inverters are fast while AND gates are slow, so the process will likely be something like the following:

A=0 => A=1
C=1 => C=1
Y=1 => Y=0
D=0 => D=1
Y=0 => Y=1

So the output SHOULD have remained static with an output of 1 both before and after the change. But, in fact, it might easily glitch down to 0 briefly before going back to a 1. This is called a "static-1" timing hazard.

The root cause is the fact that, by changing a single signal, namely A, you start a chain of events that eventually cause a change in two inputs of the same gate, namely C and D which are both inputs to the final OR gate. Which one will change first? In this case, we have a pretty good (but not absolute) idea, but in general this is a "race". If we analyze most race conditions, it doesn't matter which signal "wins" the race since the behavior of the circuit (at least any behavior that matters) is the same regardless of which one wins. This is a "non-critical race". The output Y in this case exhibits a race condition, but if it is merely applied to the data input of a flip flop, then the presence of the momentary glitch doesn't matter, and it is a non-critical race. But if the behavior of the circuit does materially depend on who wins, then it is a critical race. If Y is used as the clock input of a chip or as a write strobe to a memory or as the detonator signal to your explosives, then this would be a BAD thing.

Because identifying and mitigating critical races is, in general, a difficult thing to do, most digital designers insist of fully-synchronous designs unless there is a damn good reason to use an asynchronous design. And damn good reasons do exist.

 

So I soldered the pull down resistors and tested it and the 1HZ time base wouldnt work. So naturally I undid what I did, but my time base still does not work. I have desoldered things and resoldered them I have checked connectivity over and over again. The odd thing is there is 16K of resistance between GND and VDD. Is this normal? Maybe my crystal is broken or one of the capacitors or maybe my IC. Twice just a minute ago is it started osscilating randomly and then stopped. cold solder joint possibly?

Man this is so frustrating, I wish I had a ossciloscope.
Help please.

 

I resoldered some stuff and it works....unless I touch anything or push the set buttons. Why would that be?

 

I resoldered some stuff and it works....unless I touch anything or push the set buttons. Why would that be?

Not meaning to offend, but rather to help, and just based on the photos and your comments, I think the construction techniques may be to blame. It's a fairly complex circuit with a lot of solder joints, some of which are apparently not too good. If this is just a one-off project that is just proof of concept, continuing to "clean up" the assembly may solve your problems. For a permanent assembly, I would consider rebuilding the entire thing, this time using the proper value of resistors and capacitors instead of reaching the values you want by series and parallel connections.

Just my opinion, and you did ask.

 

Ok I dont have the caps and resistors to do that, but I have decided to desolder everything clean the board up, and the carefully solder everything back on (it was a rush job the first time). If it does not work after that then I will eithe give up or do a complete redisgn and order more parts.

Thank you.

 

If you are going to remove all the ICs, you would be ahead to put them in sockets.

 

So I soldered the pull down resistors and tested it and the 1HZ time base wouldnt work. So naturally I undid what I did, but my time base still does not work. I have desoldered things and resoldered them I have checked connectivity over and over again. The odd thing is there is 16K of resistance between GND and VDD. Is this normal? Maybe my crystal is broken or one of the capacitors or maybe my IC. Twice just a minute ago is it started osscilating randomly and then stopped. cold solder joint possibly?

Man this is so frustrating, I wish I had a ossciloscope.
Help please.

You can use the microphone in port on your computer with WinScope. It is limited to about 25 KHz.

 

If you are going to remove all the ICs, you would be ahead to put them in sockets.

True if I had them on hand.

My 4081 (quad 2 input AND) is working right so I think I will order mostly new components an sockets... I guess... Heavy sigh.

Im pretty sure my AND IC is broken because when both inputs are high the ouput is low. The funny thing is if I connect it directly to VDD it works, but if I'm using the outputs of the 4518 its output is low when both inputs are high.

Should I keep my board??? I think so because it needs to fit with the other board. I'll have to do some modifying to make it work though.

 

I rebuilt the 1HZ time base and it works...all the time.

I still don't think my 4081 is alive; How could I test it?

 

I rebuilt the 1HZ time base and it works...all the time.

I still don't think my 4081 is alive; How could I test it?

Refer to the pinout on the datasheet, connect power and ground, and try out each gate. Put an LED and a resistor on each output pin one at a time, and take both inputs high; the LED should light. Take either or both inputs to ground and the LED should not light. Repeat the process on all four gates.

 

I tried and it worked, but when I give it two high inputs from the outputs of the 4518 the AND output is low. My OR IC is acting the same way. It works when directly connected to GND or VDD but when I use the ouputs of the 4518 it does not work. I've tested my 4518 and it works.

It all seems fishy. Maybe my AND and OR is broken, but they borh work just not with inputs from the 4518. I've prototyped this same design before on my breadboard and it worked perfectly, so it can't be my design.

Got any tips?

I will probably stop by radioshack after work and see if they have a OR or/and an AND (hehehehe), but I doubt they will.

I wish there was a better electronics store near me than Radio Shack.

 

Your problem could be with the timing of the signals to increment the minutes and hours; they may be too short. If you change your AND gates to NAND gates and add INVERTERS, you can create a longer pulse with this addition.

 

That's odd. The thing is it worked before (the exact same circuit and ICs.) I put a LED on each of the inputs of the AND and they continually high but the output was low. Isn't the output constant as long as the input is constant?

 

That's odd. The thing is it worked before (the exact same circuit and ICs.) I put a LED on each of the inputs of the AND and they continually high but the output was low. Isn't the output constant as long as the input is constant?

True, but your input is not constant.
When the seconds (or minutes) reach 60, the AND gate goes high, which resets the the counter (60), then the AND gate goes low which pulses the next counter. This all happens in nanoseconds (the propagation delay of the AND gate and the propagation delay of the counter).

 

Yes but my reset is held low when I was testing it. It just does not make sense either way hopefully radioshack will have a 4081 and 4071.

I don't mean to shout, just emphasize a point: AND I TESTED IT SEVERAL TIMES BEFORE AND IT WORKED FULLY THEN.