# Arithmetic And Logic Circuits

Discussion in 'Homework Help' started by The_Rock, Aug 22, 2012.

1. ### The_Rock Thread Starter New Member

Aug 16, 2012
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0
Hi Everyone,

Here's the question.

--> Design a 4-bit arithmetic unit, using the 74LS283 4-bit parallel adder, that can perform addition as well as subtraction of 4-bit words.
The system should produce the correct result for both minuend greater than the subtrahend case, and subtrahend greater than the minuend case.

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2. ### Austin Clark Member

Dec 28, 2011
409
44
http://en.wikipedia.org/wiki/Ones%27_complement
That'll give you an ultra-easy way to represent and add/subtract positive and negative numbers. It's, literally, like magic

Basically, use the number representation given on that wiki page. Then, to represent a negative number, you just invert all the bits of that number, and to subtract numbers, you just invert the second numbers bits ( Because adding a negative is like subtraction). Easy as that. You use the adder like normal after that, the output will be the correct value given your new encoding scheme. You just need logic to invert the numbers correctly when wanted. Notice, however, that positive and negative zero have two different enocodings, even though they're the same number. This causes problems, consider the case when you have -0 + 1, you'd get 0. You can avoid this by adding logic that avoids, don't add a number by it's negative inverse (Don't do 5 + -5 = ), or add more logic to detect this state and correct for it.

http://en.wikipedia.org/wiki/Two's_complement
A method without the negative zero problem is this. However, to design it might be a tad more difficult, as to make a number negative you can't just invert each bit, you must subtract by 1 and THEN invert each bit (Or invert each bit and ADD one). Other than that everything else is the same, you add like normal, and to subtract you just find the negative of the second number.

Last edited: Aug 22, 2012
3. ### WBahn Moderator

Mar 31, 2012
17,450
4,701
But think about this. If -0+1 yields 0, then why wouldn't -0+2 yield 1? Or why wouldn't -1+2 yield 0?

Let's look at a few examples of a 1's complement adder that uses a 4-bit binary adder as it's core.

-3 + 5 = ?
-(0011) + (0101)
(1100) + (0101)
(0001) = 1

-5 + 3 = ?
-(0101) + (0011)
(1010) + (0011)
(1101) = -(0010) = -2

Any time you are crossing the 0 boundary, you will have a one-off error specifically because you have the two representation for 0 and because they are in the normal binary progression from. Hence the distance between a positive value and a negative value is always one greater than it should be. Correcting for it isn't trivial (but it's not super difficult, either) because you can't just look at the answer, you have to look at the operands and the answer.

Using two's complement, the circuit work's beautifully. If you want to take the negative of a number (don't matter it is it positive or negative), you invert all the bits and add one. Inverting all of the bits is, of course, trivial. But if you have a binary adder, so it adding one -- hint, what does the Carry In do?

You will still have one poorly behaved value (because the number range from -N to +N has an odd number of values but your representation can represent an even number of values). But in 2's complement, the odd value is the most negative value possible (it has no positive counterpart), but the fact that it is at the extreme end of the range means that it has no effect on the validity of results unless that particular value is one of the operands, which is easy to trap.

You might find this material useful, though it is presented from a very theoretical perspective.

2's Complement

Austin Clark likes this.
4. ### Austin Clark Member

Dec 28, 2011
409
44
Brilliant, very helpful! Op should listen to this.