Anyone can help to simplify?

Discussion in 'Homework Help' started by penghow5779, Jul 28, 2012.

  1. penghow5779

    Thread Starter New Member

    Jul 28, 2012
    3
    0
    ab'c'e+a'c'de+a'b'c'd+a'b'ce+acde+bcd'e
    =???

    this i use the KMAP to grouping ....
    cause my question is asking to design a circuit that detects if a 5-bit input is a prime number.the output will be asserted(out a one) when the input has exactly two divisors.
     
    Last edited: Jul 28, 2012
  2. aaval002

    New Member

    Jul 22, 2012
    16
    3
  3. penghow5779

    Thread Starter New Member

    Jul 28, 2012
    3
    0
    ab'c'e+a'c'de+a'b'c'd+a'b'ce+acde+bcd'e

    this i use the KMAP to grouping ....
    cause my question is asking to design a circuit that detects if a 5-bit input is a prime number.the output will be asserted(out a one) when the input has exactly two divisors.
     
  4. aaval002

    New Member

    Jul 22, 2012
    16
    3
    Yes. I'm assuming those 6 numbers you have there, once converted to decimal values, are all the prime numbers from 0 to 31. (Though I feel like there are more prime numbers... 2,3,5,7,11,13,17... just that is over 6 prime numbers!)

    If so, your design to use OR gates for these prime numbers, is correct.

    You would then use the KMAP to group them, to get the simplified design, and that would be the solution.

    I believe your last statement is just the definition of a prime number, the factors are one and itself, so I think this is what it means by exactly two divisors.

    In sum, I would suggest checking to see that you truly do have all the prime numbers, then you can use the same idea you have now, and simplify with the KMaps. :)
     
  5. penghow5779

    Thread Starter New Member

    Jul 28, 2012
    3
    0
    but question have some requirement
    In your current stock, you have many INV and 3-input AND gates.
    and some 2-input AND and 2-input OR gates, you are requested to reduce buying new extra gates.Based on the given scenario and limitations, generate the circuit.

    [​IMG]

    [​IMG]
     
  6. aaval002

    New Member

    Jul 22, 2012
    16
    3
    I'm not entirely sure of the parameters here, since you'd have to be specific with how many 3-Input AND can you use, how many 2-Input AND, how many 2-Input OR, and how many inverters. I'd say you can try with the K-Map simplified version, and see if you can still make the same design, except you can use manipulations to avoid new extra gates. http://en.wikipedia.org/wiki/NAND_logic This shows how to use a NAND gate to build basically anything, since NAND and NOR are universal. You could also use this trick http://www.doctronics.co.uk/images/4081_03.gif to get the gates you wanted.

    In sum, I'd say try to build the K-Map equation you derived following the parameters while taking advantage of the links mentioned above, and try to build the original non-simplified equation as well and see which one is better. Lastly, you could use Boolean algebra to simplify the equation in such a way that you make use only of the given parameter gates from the beginning. Compare all three and see which one is the best option.
     
    penghow5779 likes this.
  7. WBahn

    Moderator

    Mar 31, 2012
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    The way you have drawn the K-map makes it hard to spot reductions involving C. As near as I can tell, the total number of product terms will be the same, but you have several different options and some of those might map to your gate choices better than others.

    In order to answer the question, it's important to know the distinction between 'many' and 'some'. It is probably safe to assume that you can use as many INT and NAND3 gates as you like, but that you are somehow limited on the others. Well, you can make a NAND2 out of a NAND3 by tying the unused input HI or to one of the other two inputs. You can make a 2-input OR gate by combining INV and NAND3 gates appropriately. So, without a numerical limitation, I would use however many you want and then assert that if you need more than you have, you can synthesize the additional ones from your stock of 'many' INV and NAND3 gates. You could actually use whatever gate is convenient, since ANY gate can be constructed from a combination of INV and AND gates.
     
  8. WBahn

    Moderator

    Mar 31, 2012
    17,737
    4,789
    Basically, you are going into 3-D. Draw one 4-variable input K-map for fifth variable being 0 and another for it being 1. Draw them one below the other on a piece of paper, but imagine that they are stacked on top of each other. You are now looking for rectangular volumes (instead of square areas) in which all the values are 1. With a bit of practice, it is pretty easy to do a total of 6-variables with way, just be sure to stack them in Gray code order.
     
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