AND Gate Problem

Discussion in 'General Electronics Chat' started by sj666, Oct 14, 2011.

  1. sj666

    Thread Starter New Member

    Jun 23, 2011
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    Need help on a 4073 and 4081 AND Gate. When i plug the ICs on a 6 volt power supply and leaving its inputs unconnected, some of the output pins are already on a high state. I dont understand how this is happening.
     
  2. kubeek

    AAC Fanatic!

    Sep 20, 2005
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    All inputs of CMOS chips have to be connected either to gnd or to +V. Leaving them floating will result in oscillations and unknown state of the ouputs. The inputs have very large input resistance so they act like antennas.
     
  3. ErnieM

    AAC Fanatic!

    Apr 24, 2011
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    CMOS inputs look like capacitors and they can and do hold a charge. They can pick up a stray "1" input and thus drive the output.

    Even power MOSFETs work like this. I used to do a "dynamic" test of a big TO-3 package MOSFET by shorting G-S, seeing D-S was open, then tap the gate with the ohmmeter + lead (thus putting a positive gate voltage charge on it), then seeing D-S was shorted.

    Dem caps are real. Never leave a gate input unattended.
     
  4. SgtWookie

    Expert

    Jul 17, 2007
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    You must never leave the INPUTS for CMOS IC's floating; as they will "float" at unpredictable voltage levels.

    Always provide a path from all inputs to either Vdd or GND/Vss so that they are at a valid logic level. You can connect them directly, use resistors (10k is very commonly used with 4000 series CMOS) or by some other means. If you don't, you will have difficult-to-troubleshoot problems.

    This is not true of OUTPUTS; if you have OUTPUTS that you don't need, then don't connect them to anything. But as I've already stated, all INPUTS must be connected. If you don't remember this, you will have problems.

    Also, you will need to use 0.1uF capacitors across the Vdd and Vss/GND pins of each and every IC that you use. If you omit them, your circuit might work, but you will likely have intermittent errors that will be hard to find.

    [eta]
    Looks like I'm late to the dogpile. ;)
     
  5. Wendy

    Moderator

    Mar 24, 2008
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    Did someone say Dog Pile!!!

    Here is a common technique if you need to manually input logic levels into CMOS gates...

    [​IMG]

    The resistors can be 10KΩ to 1MΩ.
     
  6. colinb

    Active Member

    Jun 15, 2011
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    @Bill_Marsden:
    I assume your pushbutton input conditioning circuit's purpose is to produce clean transitions by preventing switch bounce: there is one "set" button and one "reset" button, right? That might help the OP to understand why it should be used.
     
  7. Wendy

    Moderator

    Mar 24, 2008
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    Actually I was going for something more general than that, though that is what the circuits are designed to do.

    Anytime you need to input a 1/0 into a gate manually you will need a pull up or pull down resistor.
     
  8. colinb

    Active Member

    Jun 15, 2011
    351
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    Or, you could just let the two momentary switches pull the input up/down and let the CMOS input gate capacitance maintain the state (“memory”)! :)

    Don't do that... do what Bill said. :)
     
  9. sj666

    Thread Starter New Member

    Jun 23, 2011
    8
    0
    Thank you very much to all for the replies. This definitely solved the problem. I am now progressing on my project.
     
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